NSC800 datasheet(25/76 Pages) NSC

25 / 76 page

NSC800 SOFTWARE

100 Introduction

This chapter provides the reader with a detailed description

of the NSC800 software Each NSC800 instruction is de-

scribed in terms of opcode function flags affected timing

and addressing mode

110 Addressing Modes

The following sections describe the addressing modes sup-

ported by the NSC800 Note that particular addressing

modes are often restricted to certain types of instructions

Examples of instructions used in the particular addressing

modes follow each mode description

The 10 addressing modes and 158 instructions provide a

flexible and powerful instruction set

111 REGISTER

The most basic addressing mode is that which addresses

data in the various CPU registers In these cases bits in the

opcode select specific registers that are to be addressed by

the instruction

Example

Instruction Load register B from register C

Mnemonic LD

Opcode

TLC5171 – 50

In this instruction both the B and C registers are addressed

by opcode bits

112 IMPLIED

The implied addressing mode is an extension to the register

addressing mode In this mode a specific register the accu-

mulator is used in the execution of the instruction In partic-

ular arithmetic operations employ implied addressing since

the A register is assumed to be the destination register for

the result without being specifically referenced in the op-

code

Example

Instruction Subtract the contents of register D from the

Accumulator (A register)

Mnemonic SUB

Opcode

TLC5171 – 51

In this instruction the D register is addressed with register

addressing while the use of the A register is implied by the

opcode

113 IMMEDIATE

The most straightforward way of introducing data to the

CPU registers is via immediate addressing where the data

is contained in an additional byte of multi-byte instructions

Example

Instruction Load the E register with the constant value

X’7C

Mnemonic LD

EX’7C

Opcode

TLC5171 – 52

In this instruction the E register is addressed with register

addressing while the constant X’7C is immediate data in the

second byte of the instruction

114 IMMEDIATE EXTENDED

As immediate addressing allows 8 bits of data to be sup-

plied by the operand immediate extended addressing al-

lows 16 bits of data to be supplied by the operand These

are in two additional bytes of the instruction

Example

Instruction Load the 16-bit IX register with the constant

value X’ABCD

Mnemonic LD

IXX’ABCD

Opcode

TLC5171 – 53

In this instruction register addressing selects the IX regis-

ter while the 16-bit quanity X’ABCD is immediate data sup-

plied as immediate extended format

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