STM32L476RE datasheet(53/232 Pages) STMICROELECTRONICS

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STM32L476xx

Functional overview

The major features are:

•

Combined Rx and Tx FIFO size of 1.25 KB with dynamic FIFO sizing

•

Supports the session request protocol (SRP) and host negotiation protocol (HNP)

•

1 bidirectional control endpoint + 5 IN endpoints + 5 OUT endpoints

•

8 host channels with periodic OUT support

•

HNP/SNP/IP inside (no need for any external resistor)

•

Software configurable to OTG 1.3 and OTG 2.0 modes of operation

•

OTG 2.0 Supports ADP (Attach detection Protocol)

•

USB 2.0 LPM (Link Power Management) support

•

Battery Charging Specification Revision 1.2 support

•

Internal FS OTG PHY support

For OTG/Host modes, a power switch is needed in case bus-powered devices are

connected.

3.35

Flexible static memory controller (FSMC)

The Flexible static memory controller (FSMC) includes two memory controllers:

•

The NOR/PSRAM memory controller

•

The NAND/memory controller

This memory controller is also named Flexible memory controller (FMC).

The main features of the FMC controller are the following:

•

Interface with static-memory mapped devices including:

–

Static random access memory (SRAM)

–

NOR Flash memory/OneNAND Flash memory

–

PSRAM (4 memory banks)

–

NAND Flash memory with ECC hardware to check up to 8 Kbyte of data

•

8-,16- bit data bus width

•

Independent Chip Select control for each memory bank

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Independent configuration for each memory bank

•

Write FIFO

•

The Maximum FMC_CLK frequency for synchronous accesses is HCLK/2.

LCD parallel interface

The FMC can be configured to interface seamlessly with most graphic LCD controllers. It

supports the Intel 8080 and Motorola 6800 modes, and is flexible enough to adapt to

specific LCD interfaces. This LCD parallel interface capability makes it easy to build cost

effective graphic applications using LCD modules with embedded controllers or high

performance solutions using external controllers with dedicated acceleration.

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