TDA7705 datasheet(15/42 Pages) STMICROELECTRONICS

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TDA7705

Function description

Doc ID 15938 Rev 9

15/42

Figure 5.

SPI modes

In the case of the TDA7705, the data are latched on the clock's rising edge, with CPOL = 1

and CPHA = 1 (mode 3 in the figure above). According to the specification of this mode, the

polarity of the CLK line when no communication is taking place is high.

A "write" communication example is shown in the figure below, for an unspecified number of

bits (see the relevant technical documentation for frame structure description):

Figure 6.

SPI "write" sequence

The start condition is signaled by the CS line going low, and the stop condition by the CS

line going high. It is not allowed to toggle the CS line while the communication is going on.

A "read" communication example is shown in the figure below, for an unspecified number of

bits (see the relevant technical documentation for frame structure description ):

Figure 7.

SPI "read" sequence

The red line is controlled by the TDA7705, whereas the black lines are controlled by the µP.

...

LSB

...

CLK

MOSI

MSB

LSB

...

LSB

MSB

...

MISO

...

CLK

MOSI

MSB

...

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