STIPN2M50-H

Smart shutdown function

DocID030065 Rev 4

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Figure 6: Smart shutdown timing waveforms

Please refer to Table 13: "Sense comparator characteristics (VCC = 15 V unless otherwise

specified)" for internal propagation delay time details.

SHUTDOW N CIRCUIT

An approximation of the disable time is given by:

H IN /LIN

H VG/LVG

open-drain gate

(internal)

com p V ref

C P+

PROTECTION

the driver outputs are set to the SD state as soon as the com parator

triggers even if the SD signal hasn’t reached the lowest input threshold

disable tim e

SD /OD

SD/OD

V

SMART SD

LOGIC

C_SD

R_SD

RPD_SD

RON_OD

Vbias

GADG171120161315SA