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CC1150-RTY1 数据表(PDF) 42 Page - Texas Instruments |
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CC1150-RTY1 数据表(HTML) 42 Page - Texas Instruments |
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42 / 67 page  CC1150 SWRS037B – JANUARY 2006 – REVISED MARCH 2015 www.ti.com 5.20.1 Configuration Register Details Table 5-14. 0x01: IOCFG1 – GDO1 Output Pin configuration BIT FIELD TYPE RESET DESCRIPTION 7 GDO_DS R/W 0x0 Set high (1) or low (0) output drive strength on the GDO pins. 6 GDO1_INV R/W 0x0 Invert output, that is, select active low (1) / high (0). 5:0 GDO1_CFG[5:0] R/W 0x2E Default is tri-state (See Table 5-10). Table 5-15. 0x02: IOCFG0 – GDO0 Output Pin Configuration BIT FIELD TYPE RESET DESCRIPTION 7 TEMP_SENSOR_ENABLE R/W 0x0 Enable analog temperature sensor. Write 0 in all other register bits when using temperature sensor. 6 GDO0_INV R/W 0x0 Invert output, that is, select active low (1) / high (0). 5:0 GDO0_CFG[5:0] R/W 0x3F Default is CLK_XOSC/192 (See Table 5-10). It is recommended to disable the clock output during initialization in order to optimize RF performance. Table 5-16. 0x03: FIFOTHR – FIFO Threshold BIT FIELD TYPE RESET DESCRIPTION 7:4 Reserved R/W 0x0 Write 0 for compatibility with possible future extensions. 3:0 FIFO_THR[3:0] R/W 0x07 Set the threshold for the TX FIFO. The threshold is exceeded when the number of bytes in the FIFO is equal to or higher than the threshold value. The binary number is the setting and the result (Bytes in TX FIFO) is the next state after finishing packet transmission. 0000 = 61 0001 = 57 0010 = 53 0011 = 49 0100 = 45 0101 = 41 0110 = 37 0111 = 33 1000 = 29 1001 = 25 1010 = 21 1011 = 17 1100 = 13 1101 = 9 1110 = 5 1111 = 1 Table 5-17. 0x04: SYNC1 – Sync Word, High Byte BIT FIELD TYPE RESET DESCRIPTION 7:0 SYNC[15:8] R/W 0xD3 8 MSB of 16-bit sync word. Table 5-18. 0x05: SYNC0 – Sync Word, Low Byte BIT FIELD TYPE RESET DESCRIPTION 7:0 SYNC[7:0] R/W 0x91 8 LSB of 16-bit sync word. 42 Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1150 |
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