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GG25L

I²C interface

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7.2.2

Register description

Values held in consecutive registers (such as the charge value in the REG_SOC register

pair) are stored with high bits in the first register and low bits in the second register. The

registers must be read with a single I²C access to ensure data integrity. It is possible to read

multiple values in one I²C access. All values must be consistent.

The SOC data are coded in binary format and the LSB of the low byte is 1/512 %. The

battery current is coded in 2’s complement format and the LSB value is 5.88 µV. The battery

voltage is coded in 2’s complement format and the LSB value is 2.20 mV. The temperature

is coded in 2’s complement format and the LSB value is 1°C.

Table 14. REG_MODE - address 0

Name

Position

Type

Def.

Description

VMODE

0

R/W

1

0: Mixed mode (Coulomb counter active)



1: Power saving voltage mode

CLR_VM_ADJ

1

R/W

0

Write 1 to clear ACC_VM_ADJ and

REG_VM_ADJ.



Auto clear bit if GG_RUN = 1

CLR_CC_ADJ

2

R/W

0

Write 1 to clear ACC_CC_ADJ and REG_CC_ADJ



Auto clear bit if GG_RUN = 1

ALM_ENA

3

R/W

1

Alarm function



0: Disabled



1: Enabled

GG_RUN

4

R/W

0

0: Standby mode. Accumulator and counter

registers are frozen, gas gauge and battery

monitor functions are in standby.



1: Operating mode.

FORCE_CC

5

R/W

0

Forces the mixed mode relaxation timer to switch

to the Coulomb counter mode.



Write 1, self clear to 0



Relaxation counter = 0

FORCE_VM

6

R/W

0

Forces the mixed mode relaxation timer to switch

to voltage gas gauge mode.



Write 1, self clear to 0



Relaxation counter = Relax_max

7

Unused