TNETV2666FIBZWT datasheet(3/249 Pages) TI1

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TMS320C6424

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SPRS347D – MARCH 2007 – REVISED DECEMBER 2009

input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other

peripherals; 2 UARTs with hardware handshaking support on 1 UART; 3 pulse width modulator (PWM)

peripherals; 1 peripheral component interconnect (PCI) [33 MHz]; and 2 glueless external memory

interfaces: an asynchronous external memory interface (EMIFA) for slower memories/peripherals, and a

higher speed synchronous memory interface for DDR2.

The Ethernet Media Access Controller (EMAC) provides an efficient interface between the C6424 and the

network. The C6424 EMAC supports 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) and 100

Mbps in either half- or full-duplex mode, with hardware flow control and quality of service (QOS) support.

The Management Data Input/Output (MDIO) module continuously polls all 32 MDIO addresses in order to

enumerate all PHY devices in the system.

The I2C and VLYNQ ports allow C6424 to easily control peripheral devices and/or communicate with host

processors.

The rich peripheral set provides the ability to control external peripheral devices and communicate with

external processors. For details on each of the peripherals, see the related sections later in this document

and the associated peripheral reference guides.

The C6424 has a complete set of development tools. These include C compilers, a DSP assembly

optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into

source code execution.

TMS320C6424 Fixed-Point Digital Signal Processor

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TNETV2666FIBZWT 数据表(PDF) 3 Page - Texas Instruments