Inputs/outputs

STUSB4700

8/32

DocID030193 Rev 2

allows to consider independently UVLO and OVLO voltage thresholds on VDD pin as

2.3.9

GND

Ground.

2.3.10

VVAR_ADDR0

At startup, this pin is latched to set I²C device address 0 bit. During operation, this output

can be used as an analog voltage output to control the power management unit. Analog

appropriate NVM configuration.

2.3.11

GPIO [4:0]

Table 6: GPIO0 (pin #12) configuration

Select

Value

Configuration

Comments

GPIO0_sel

GPIO0 = Sel_PDO2

Active Low

Table 7: GPIO1 (pin #11) configuration

Select

Value

Configuration

Comments

GPIO1_sel

GPIO1 = Sel_PDO3

Active Low

Table 8: GPIO2 (pin #14)

– GPIO3 (pin #15) – GPIO4 (pin #16) configuration

Select

Value

Configuration

Comments

GPIO234_sel[1:0]

GPIO2 = Sel_PDO4

Active Low

GPIO3 = Sel_PDO5

Active Low

GPIO4 = Attached

Active Low

Other configurations are available (please contact our customer support).

2.3.12

VREG2V7

This pin is used only for external decoupling of 2.7 V internal regulator.

Recommended decoupling capacitor: 1 µF typ. (0.5 µF min; 10 µF max).

This pin must not be used to supply any external component.

2.3.13

VREG1V2

This pin is used for external decoupling of 1.2 V internal regulator.

Recommended decoupling capacitor: 1 µF typ. (0.5 µF min; 10 µF max).

2.3.14

VBUS_DISCH

Control signal for external VBUS_DISCH path.

2.3.15

This power input is connected to a power source that can be a 5 V power supply, or a

lithium battery. It is used to supply e-marked cables. It is internally connected to power