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L6739 数据表(PDF) 26 Page - STMicroelectronics |
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L6739 数据表(HTML) 26 Page - STMicroelectronics |
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26 / 30 page ![]() Application information L6739 26/30 DocID026384 Rev 1 10.3 Input capacitors The input capacitor bank is designed considering mainly the input RMS current that depends on the output deliverable current (IOUT) and the duty cycle (D) for the regulation as follows: Equation 18 The equation reaches its maximum value, IOUT / 2, with D = 0.5. The losses depend on the input capacitor ESR and, in the worst case, are: Equation 19 Irms IOUT D1 D – = PESR IOUT 2 2 = |
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