Pin configuration

STEF05D

4/19

DocID024394 Rev 1

2

Pin configuration

Figure 2. Pin configuration (top view)

Table 2. Pin description

Pin N°

Symbol

Note

1 to 5

Connected to the Source of the internal power MOSFET and to the output

terminal of the fuse

6

NC

Not connected

7

I-Limit

A resistor between this pin and the Source pin sets the overload and short-

circuit current limit levels.

8

En/Fault

The enable/fault pin is a tri-state, bi-directional interface. During normal

operation the pin must be left floating, or it can be used to disable the output

of the device by pulling it to Ground using an open drain or open collector

device.

If a thermal fault occurs, the voltage on this pin will go to an intermediate

state to signal a monitor circuit that the device is in thermal shutdown. It can

be connected to another device of this family to cause a simultaneous

shutdown during thermal events.

9dv/dt

The internal dv/dt circuit controls the slew rate of the output voltage at turn-

on. The internal capacitor allows a ramp-up time of around 1ms. An external

capacitor can be added to this pin to increase the ramp time. If an additional

capacitor is not required, this pin should be left open.

10

GND

Ground Pin

11

V

CC

Source

Source

Source

Source

Source

GND

dv/dt

En/fault

I-Limit

N/C

AM09867v1