LNBH25 datasheet(9/34 Pages) STMICROELECTRONICS

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LNBH25

Application information

Doc ID 022433 Rev 4

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2.13

TDET: 22 kHz tone detection

When a 22 kHz tone presence is detected on the DETIN pin, the TDET I²C bit is set to “1”.

2.14

IMON: minimum output current diagnostic

In order to detect the output load absence (no LNB connected on the bus or cable not

connected to the IRD) the LNBH25 is provided with a minimum output current flag by the

IMON I²C bit, accessible in read mode, which is set to “1” if the output current is lower than

12 mA (typ.). It is recommended to use IMON function only with the 22 kHz tone

transmission deactivated, otherwise the IMON bit could be set to “0” even if the output

current is below the minimum current threshold. To activate IMON diagnostic function, set to

“1” the EN_IMON I²C bit in the DATA 4 register. Be aware that as soon as the IMON function

is activated by means of EN_IMON=1, the VOUT is immediately increased to 21 V (typ.)

independently on the VSEL bit setting. This operation is applied in order to be sure that the

LNBH25 output has the higher voltage present in the LNB bus. Do not use this function in an

application environment where 21 V voltage level is not supported by other peripherals

connected to the LNB bus.

2.15

PDO: overcurrent detection on output pull-down stage

When an overcurrent occurs on the pull-down output stage due to an external voltage

source greater than LNBH25 nominal VOUT and for a time longer than ISINK_TIME-OUT (10

ms typ.), the PDO I²C bit is set to “1”. This may happen due to an external voltage source

present on the LNB output (VOUT pin).

For current threshold and deglitch time details, see

Table 13.

2.16

Power-on I²C interface reset and undervoltage lockout

The I²C interface built into LNBH25 is automatically reset at power-on. As long as the VCC

stays below the undervoltage lockout (UVLO) threshold (4.7 V typ.), the interface does not

respond to any I²C command and all DATA register bits are initialized to zeroes, therefore

keeping the power blocks disabled. Once the VCC rises above 4.8 V typ. the I²C interface

becomes operative and the DATA registers can be configured by the main microprocessor.

2.17

PNG: input voltage minimum detection

When input voltage (VCC pin) is lower than LPD (low power diagnostic) minimum thresholds,

the PNG I²C bit is set to “1” and the FLT pin is set low. Refer to

Table 13 for threshold details.

2.18

ISW: inductor switching current limit

In order to allow low saturation current inductors to be used, the maximum DC-DC inductor

switching current limit threshold can be set by means of one I²C bit (ISW). Two values are

available: 2.5 A typ. (with ISW = 1) and 4 A typ. (with ISW = 0).

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