LNBP8L datasheet(9/21 Pages) STMICROELECTRONICS

9 / 21 page

LNBP8L - LNBP9L - LNBP10L - LNBP11L

Detailed description and application hints

9/21

Detailed description and application hints

The LNBPxx is made up of several functional blocks (see Figure 1 on page 3), as described

below:

The oscillator is activated by setting the ENT pin (enable tone) = H, and is factory-

trimmed at 22 kHz ± 2 kHz, eliminating the need to use external trimming. The rising

and falling edges are maintained in the 5 to 15 µs range (10 µs typ.), to avoid RF

pollution of the receiver. The duty cycle is 50% typ. It modulates the DC output with a ±

0.325 V typ. amplitude and 0 V average. The presence of this signal usually gives the

LNB information about the band to be received.

The 3-state enable & VOUT selection block, selects the two output voltages or sets the

IC to shutdown mode, depending on the voltage applied on the EN/VSEL pin.

When EN/VSEL is set high (EN/VSEL > 2.2 V), an 18 V output voltage is selected;

when the EN/VSEL is set low (EN/VSEL < 0.8 V), a 13 V output voltage is selected.

If the EN/VSEL pin is left floating (high impedance) or if the pin is set in a range from

1.2 V to 1.8 V (1.5 V typ.), the IC goes into shutdown mode and the output voltage will

be set to 0 V.

This feature changes the LNB polarization type. The LNB switches to horizontal or

vertical polarization depending on the supply voltage it gets from the receiver.

For the DFN package, in order to keep the power dissipation of the device as low as

possible, the input selector automatically selects VCC1; that is, the lowest input voltage,

when 13 V output is selected (i.e. EN/VSEL is low). If the 18 V output is selected (i.e.

EN/VSEL is high), the VCC2 input pin is selected. For example, power dissipation at

IOUT = 350 mA is:

PD = (23 - 18) x 0.35 = 1.75 W

with VCC2 = 23 V (voltage on the VCC2 pin) and VOUT = 18 V, and

PD = (16 - 13) x 0.35 = 1.05 W

with VCC1 = 16 V (voltage on the VCC1 pin) and VOUT = 13 V

For IPPAK package, VCC1 and VCC2 are internally connected and must be supplied from a

single input voltage line (22 V min.) to the VCC pin. In this case the worst case power

dissipation is 13 V output. For example: at IOUT = 350 mA and VCC = 23 V (voltage on the

VCC pin):

PD = (23 - 13) x 0.35 = 3.5 W

The line length compensation function is useful when the antenna is connected to the

receiver by a long coaxial cable that adds a considerable DC voltage drop. When the

LCC pin is H, the output voltage selected is increased by about 1 V. This function is

available for the DFN package only.

The reference drives all the internal blocks that require a high-precision thermally

compensated voltage source.

The LNBPxx has two different protection features, and both turn off the outputs. The

first one protects against overheating (i.e. for TJ ≥ 150 °C), and the second against

overload conditions (i.e. for output current > 550 mA) or short-circuit:

In the thermal protection case the output is disabled until the chip temperature has

fallen below 140 °C typ. and the LNBPxx output is restored.

The overload protection case occurs when output current request is

≥ 500 mA. For

the DFN package only, the IC features dynamic overload and short-circuit

LNBP8L 数据表(PDF) 9 Page - STMicroelectronics

LNBP8L 数据表(HTML) 9 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

数据表下载