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ST7MC2S4-Auto 数据表(PDF) 318 Page - STMicroelectronics

部件名 ST7MC2S4-Auto
功能描述  Clock, reset and supply management
PDF  371 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7MC2S4-Auto 数据表(HTML) 318 Page - STMicroelectronics

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Product(s)
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Electrical characteristics
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
318/371
Figure 133. Typical IDD in SLOW vs fCPU
12.4.2
Wait and Slow Wait modes
Figure 134. Typical IDD in Wait vs fCPU
0.0
0.5
1.0
1.5
2.0
2.5
3.0
01
23
45
67
8
Fcpu Mhz
Table 193.
Wait and Slow Wait modes
Symbol
Parameter
Conditions
Typ
Max(1)
Unit
IDD
Supply current in Wait mode(2)
(see Figure 134)
4.5V < VDD < 5.5V
fOSC =16MHz,
fCPU =8MHz
812
mA
Supply current in Slow Wait mode(2)
(see Figure 135)
fOSC =16MHz,
fCPU = 500 kHz
3.5
5
1.
Data based on characterization results, tested in production at VDD max. and fCPU max.
2.
Measurements are done in the following conditions:
- Program executed from RAM, CPU running with RAM access. The increase in consumption when executing from Flash is
50%.
- All I/O pins in input mode with a static value at VDD or VSS (no load)
- All peripherals in reset state.
- LVD disabled.
- Clock input (OSC1) driven by external square wave.
- In Slow and Slow Wait mode, fCPU is based on fOSC divided by 32.
To obtain the total current consumption of the device, add the clock source (Section 12.5.3) and the peripheral power
consumption.
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
01
23
4
5
6
7
8
Fcpu Mhz
Obsolete
Product(s)
- Obsolete
Product(s)



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