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ST7MC2S4-Auto 数据表(PDF) 319 Page - STMicroelectronics

部件名 ST7MC2S4-Auto
功能描述  Clock, reset and supply management
PDF  371 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7MC2S4-Auto 数据表(HTML) 319 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
Electrical characteristics
319/371
Figure 135. Typical IDD in Slow Wait vs fCPU
12.4.3
Halt and Active Halt modes
12.4.4
Supply and clock managers
The previous current consumption specified for the ST7 functional operating modes over
temperature range does not take into account the clock source current consumption. To get
the total device consumption, the two current values must be added (except for Halt mode).
0.0
0.5
1.0
1.5
2.0
2.5
01
23
4
5
67
8
Fcpu Mhz
Table 194.
Halt and Active Halt modes
Symbol
Parameter
Conditions
Typ Max Unit
IDD
Supply current in Halt mode(1)
1.
All I/O pins in push-pull output mode (when applicable) with a static value at VDD or VSS (no load), PLL and
LVD disabled. Data based on characterization results, tested in production at VDD max. and fCPU max.
VDD = 5.5V
-40°C < TA < +85°C
1
10
µA
-40°C < TA < +125°C
50
Supply current in Active Halt mode(2)
2.
All I/O pins in input mode with a static value at VDD or VSS. Tested in production at VDD max and fCPU max
with clock input OSC1 driven by an external square wave; VDD applied on OSC2 to reduce oscillator
consumption. Consumption may be slightly different with a quartz or resonator.
16 MHz external clock
1
1.5
mA
Table 195.
Supply and clock managers
Symbol
Parameter
Conditions
Typ
Max
Unit
IDD(LVD) LVD supply current
Halt mode
180
280
µA
IDD(PLL) PLL supply current
VDD = 5V
700
Obsolete
Product(s)
- Obsolete
Product(s)



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