STM8L151F3 datasheet(31/122 Pages) STMICROELECTRONICS

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STM8L151x2, STM8L151x3

Pinout and pin description

Note:

The slope control of all GPIO pins, except true open drain pins, can be programmed. By

default, the slope control is limited to 2 MHz.

4.1

System configuration options

As shown in Table 4: Low-density STM8L151x2/3 pin description, some alternate functions

can be remapped on different I/O ports by programming one of the two remapping registers

described in the “Routing interface (RI) and system configuration controller” section in the

STM8L15xxx and STM8L16xxx reference manual (RM0031).

-- VSSIO

- I/O ground voltage

-- VDDIO

- I/O supply voltage

1. At power-up, the PA1/NRST pin is a reset input pin with pull-up. To be used as a general purpose pin (PA1), it can be

configured only as output open-drain or push-pull, not as a general purpose input. Refer to Section Configuring NRST/PA1

pin as general purpose output in the STM8L15xxx and STM8L16xxx reference manual (RM0031).

[ ] Alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not a

duplication of the function).

3. A pull-up is applied to PB0 and PB4 during the reset phase. These two pins are input floating after reset release.

4. 20-pin and 28-pin packages only.

5. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer and protection diode to VDD are not

implemented).

6. 20-pin packages only.

7. 28-pin packages only

8. The PA0 pin is in input pull-up during the reset phase and after reset release.

9. High Sink LED driver capability available on PA0.

Table 4. Low-density STM8L151x2/3 pin description (continued)

Pin number

Pin name

Input

Output

Default alternate

function

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