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STM32F072VB 数据表(PDF) 54 Page - STMicroelectronics |
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STM32F072VB 数据表(HTML) 54 Page - STMicroelectronics |
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54 / 128 page ![]() Electrical characteristics STM32F072x8 STM32F072xB 54/128 DocID025004 Rev 5 6.3.2 Operating conditions at power-up / power-down The parameters given in Table 25 are derived from tests performed under the ambient temperature condition summarized in Table 24. 6.3.3 Embedded reset and power control block characteristics The parameters given in Table 26 are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 24: General operating conditions . Table 25. Operating conditions at power-up / power-down Symbol Parameter Conditions Min Max Unit tVDD VDD rise time rate - 0 ∞ µs/V VDD fall time rate 20 ∞ tVDDA VDDA rise time rate - 0 ∞ VDDA fall time rate 20 ∞ Table 26. Embedded reset and power control block characteristics Symbol Parameter Conditions Min Typ Max Unit VPOR/PDR(1) 1. The PDR detector monitors VDD and also VDDA (if kept enabled in the option bytes). The POR detector monitors only VDD. Power on/power down reset threshold Falling edge(2) 2. The product behavior is guaranteed by design down to the minimum VPOR/PDR value. 1.80 1.88 1.96(3) 3. Data based on characterization results, not tested in production. V Rising edge 1.84(3) 1.92 2.00 V VPDRhyst PDR hysteresis - - 40 - mV tRSTTEMPO(4) 4. Guaranteed by design, not tested in production. Reset temporization - 1.50 2.50 4.50 ms Table 27. Programmable voltage detector characteristics Symbol Parameter Conditions Min Typ Max Unit VPVD0 PVD threshold 0 Rising edge 2.1 2.18 2.26 V Falling edge 2 2.08 2.16 V VPVD1 PVD threshold 1 Rising edge 2.19 2.28 2.37 V Falling edge 2.09 2.18 2.27 V VPVD2 PVD threshold 2 Rising edge 2.28 2.38 2.48 V Falling edge 2.18 2.28 2.38 V VPVD3 PVD threshold 3 Rising edge 2.38 2.48 2.58 V Falling edge 2.28 2.38 2.48 V |
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