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STM32L062T8 数据表(PDF) 83 Page - STMicroelectronics |
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STM32L062T8 数据表(HTML) 83 Page - STMicroelectronics |
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83 / 118 page  DocID025937 Rev 8 83/118 STM32L062x8 Electrical characteristics 98 Figure 24. Typical connection diagram using the ADC 1. Refer to Table 55: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. General PCB design guidelines Power supply decoupling should be performed as shown in Figure 25 or Figure 26, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed as close as possible to the chip. Figure 25. Power supply and reference decoupling (VREF+ not connected to VDDA) |
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