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TP3410 数据表(PDF) 13 Page - National Semiconductor (TI) |
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TP3410 数据表(HTML) 13 Page - National Semiconductor (TI) |
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13 / 32 page ![]() Functional Description (Continued) The TP3410 has an enhanced MICROWIRE port such that it can connect to standard MICROWIRE master devices (such an NSC’s HPC and COP families) as well as the SCP (serial control port) interface master from the Motorola micro-con- troller family SCP is supported on devices such as MC68302 or the MC145488 HDLC TP3410 supports two popular formats used in typical termi- nal equipment applications 1 CCLK idling LOW when CS pin is inactive HIGH pulsing LOWHIGHLOW for 16 clocks then returning back to LOW for idle condition Data is output on CO pin on the negative edge and data sampled in on the positive edge of CCLK This format (shown in Figure 14b ) is normally used with NSC’s microcontrollers from the HPC or the COP8 family 2 CCLK idling HIGH when CS pin inactive HIGH pulsing HIGHLOWHIGH for 17 clocks then returning back to HIGH for idle condition Data is output on CO pin on the negative edge and data sampled in on the positive edge of CCLK This format (shown in Figure 14c ) is normally used with other alternate microcontrollers in the industry The first 16 clock pulses are the normal low-going pulses to shift and sample the microwire data The 17th pulse is generated with software by toggling the CCLK clock polarity bit on the SCP port of MC6302 or MC145488 It is necessary to deactivate the CS pin (bring it high) while the CCLK is low as shown in Figure 14c 80 GCI MODE (MWe0) Selected by tying the MW pin low the GCI interface is de- signed for systems in which PCM and control data are multi- plexed together into 4 contiguous bytes per 8 kHz frame Furthermore in Subscriber Line Cards and NT1 – 2’s (where the Digital Interface is slaved to external timing) up to 8 GCI channels may be carried in 1 frame of a GCI multiplex with a combined bit rate from 256 kbs up to 3088 kbs Pin-pro- grammable GCI-channel assignment for 8 GCI channels is provided Note that GCI mode on the TP3410 requires messages in the Embedded Operations Channel to be processed by a local microcontroller In Line card and TE applications GCI mode can be used with a device such as the TP3451 HDLC controller to provide the interface for the microcontroller to access the EOC Registers To use the device in an NT-1 or Regenerator a microcontroller is required and Microwire mode should be used on the TP3410 81 GCI Physical Interface The interface physically consists of four wires Transmit data to line Bx Receive data from line Br Bit clock at 2 cyclesbit BCLK 8 kHz frame sync FSa Data is synchronized by the BCLK and FSa clock inputs FSa insures re-initialization of the time-slot counter at the beginning of each 8 kHz frame with the rising edge of FSa being the reference time for the first GCI channel bit Data is clocked in both directions at half the BCLK input frequency Data bits are output from the device on a rising edge of BCLK and sampled on the second falling edge of BCLK unused slots are high impedance Br is an open-drain n- channel output with internal detection for contention resolu- tion on the Monitor and CI channels between devices at- tempting to use the same GCI channel (typically in a TE application) A device may be either the Master or Slave of the GCI tim- ing As a Master it is the source of BCLK FSa and FSb which are synchronized to the data received from the line and GCI channel 0 is always used As a GCI Slave BCLK and FSa must be sourced externally typically from a system backplane and pins S0 – S2 must be connected high or low to select the required GCI channel To use the single chan- nel mode a 512 kHz BCLK is required and S2 S1 and S0 must be connected to GND (GCI Channel 0) To use the multiplex mode with a GCI Slave device the 4 pins are com- moned between up to 8 devices forming a ‘‘wire-AND’’ con- nection with the Br pins The BCLK frequency must be at least n c 512 kHz where n is the number of devices In fact BCLK may be operated up to 6144 kHz if required to leave up to 4 additional GCI channels unoccupied by TP3410’s (and available for other uses) Clock and channel selection are shown in the following table Pin Name LT and NT1 – 2 NT1 and TE MW 0 0 MO 0 (GCI Slave) 1 (GCI Master) S2CLS S2 (msb) CLSe0 512 kHz CLSe1 1536 kHz S1 S1 0 S0FSb S0 (lsb) FSb TLH9151 – 15 FIGURE 6 Microwire Control Port Timing MW e 1 13 |
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