ASG-P datasheet(1/5 Pages) ABRACON

部件名	ASG-P

功能描述	Phase Locked Loops

PDF	5 Pages

Scroll/Zoom	100%

制造商	ABRACON [Abracon Corporation]

网页	https://abracon.com

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ASG-P Series

FEATURES:

APPLICATIONS:

Pb RoHS

Compliant

30332 Esperanza, Rancho Santa Margarita, California92688

tel 949-546-8000 | fax 949-546-8001| www.abracon.com

Revised: 04.27.12

Visit

www.abracon.comfor Terms & Conditions of Sale

Programmable - High Performance SMD XO & VCXO

7.0 x 5.0 x 1.9mm

STANDARD SPECIFICATIONS:

CERTIFIED

ABRACON IS

CERTIFIED

ABRACON IS

ISO9001:2008

CERTIFIED

• ASG series is a High Performance crystal based oscillator; available

either as an XO or a VCXO

• Frequency range from 10MHz to 250MHz with LVCMOS output

• Available from 10MHz to 1.50GHz with LVDS or LVPECL output

• Offered with either 2.50V or 3.30V bias voltage

• Quick turn, 1~5 business days for small quantity orders

• Networking, SONET/SDH

• WiMax / WLAN

• Computing

• Phase Locked Loops

• Direct Digital Synthesis (DDS)

• DSL/ADSL

• Base Terminal Stations

Moisture Sensitivity Level (MSL) - This product is Hermetically Sealed and not

Moisture Sensitive; therefore MSL = N/A (Not Applicable)

Note #1: Inclusive of initial tolerance at 25ºC±3ºC, operating temperature range, input voltage variation, load variation & aging.

Parameters

Minimum

Typical

Maximum

Units

Notes

Frequency Range:

Vdd = 3.3V

10

1500

MHz

Vdd = 2.5V

10

1500

MHz

Operating Temperature:

-40

+85

°C

Storage Temperature:

-55

+125

°C

Overall Frequency Stability:

-50

+50

ppm

See Note # 1

Initial Set Tolerance

-5.00

< ±1.00

+5.00

ppm

Stability over operating temperature

-35.00

< ±20.00

+35.00

ppm

Aging @ 25ºC over 10-years

-7.00

+7.00

ppm

Frequency variation over supply

voltage change (±5%)

-2.00

+2.00

ppm

Frequency variation over load

variation (15pF ± 5%)

-1.00

+1.00

ppm

Supply Voltage (Vdd):

Vdd = 3.3V

3.135

3.300

3.465

V

Vdd = 2.5V

2.375

2.500

2.625

V

Input Current:

Vdd = 3.3V

< 54

60

mA

Frequency dependent

Vdd = 2.5V

< 50

60

mA

Frequency dependent

LVPECL Output

(Out &

Out ):

Output High Voltage

VOH

Vdd - 1.03

Vdd - 0.60

V

VOH

Output Low Voltage

VOL

Vdd - 1.85

Vdd - 1.60

V

VOL

Differential Duty

Cycle

45

48/52

55

%

DODCLVPECL

Rise Time

150

350

ps

tR

Fall Time

150

350

ps

tF

Start-up Time:

< 2.0

3.0

ms

Enable/Disable Function :

"1" (VIH ≥ 0.7*Vdd) or Open: Oscillation

"0" (VIL < 0.3*Vdd) : High Z

Vcontrol Range

0.00

Vdd

Volts

For VCXO

Frequency Pull

±50

ppm

Control Port Bandwidth

10

kHz

Integer

Mode

< 0.60

1.60

ps

12kHz to 20MHz

Phase jitter RMS

[ tjit( ) ]

See Note #2

Fractional

Mode

< 0.90

1.60

ps

12kHz to 20MHz

Note #2: The rms jitter over 12kHz to 20MHz Bandwidth is dependent on the carrier and whether or not the final frequency is achieved without

engaging the Fractional Mode

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类似说明 - ASG-P

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