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CS5531-AS 数据表(PDF) 18 Page - Cirrus Logic |
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CS5531-AS 数据表(HTML) 18 Page - Cirrus Logic |
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18 / 52 page ![]() CS5531/32/33/34 18 DS289PP5 include writing the RS bit back to 0 insures the clearing of the RS bit in the event that a user does not write into the configuration register after the RS bit has been set. The RV bit in the Configuration Register is set to indicate a valid reset has occurred. The RS bit should be written back to logic “0” to complete the reset cycle. After a system initialization or reset, the on-chip controller is initialized into command mode where it waits for a valid command (the first 8-bits written into the serial port are shifted into the command register). Once a valid command is re- ceived and decoded, the byte instructs the converter to either acquire data from or transfer data to an in- ternal register(s), or perform a conversion or a cal- ibration. The Command Register Descriptions section can be used to decode all valid commands. |
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