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P9221-R 数据表(PDF) 28 Page - Integrated Device Technology |
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P9221-R 数据表(HTML) 28 Page - Integrated Device Technology |
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28 / 35 page  P9221-R Datasheet © 2017 Integrated Device Technology, Inc. 28 April 4, 2017 Table 23. Command Register Address and Bit Register Field Name R/W Default Function and Description 4EHEX [7:6] Reserved R 0HEX Reserved. 4EHEX [5] Clear Interrupt RW 0HEX If application processor sets this bit to "1," the P9221-R clears the interrupt pin. 4EHEX [4] Reserved R 0HEX Reserved 4EHEX [3] Send End of Power RW 0HEX If application processor sets this bit to "1," the P9221-R sends the end power transfer packet (defined in the End of Power Transfer register shown in Table 15) to the transmitter and then sets this bit to "0." 4EHEX [2] Reserved R 0HEX Reserved 4EHEX [1] Toggle LDO On/OFF RW 0HEX If application processor sets this bit to "1,” the P9221-R toggles the LDO output once (from on to off or from off to on), and then sets this bit to “0.” 4EHEX [0] Reserved R 0HEX Reserved |
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