9SQL4952BNLGI datasheet(1/20 Pages) IDT

部件名	9SQL4952BNLGI

功能描述	2-output CK420BQ Derivative

PDF	20 Pages

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制造商	IDT [Integrated Device Technology]

网页	http://www.idt.com

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DATASHEET

9SQL4952 DECEMBER 12, 2016

1

2-output CK420BQ Derivative

9SQL4952

Description

The 9SQL4952 is a member of IDT's 'Lite' family of server

clocks. It generates 2 100MHz outputs that exceed the

requirements of the CK420BQ CPU/SRC clocks. Each output

has its own OE# pin for clock management and supports 2

different spread spectrum levels in addition to spread off. It

also provides a copy of the 25MHz internal XO. The

9SQL4952 supports PCIe Common Clock (CC) and

Independent Reference Clock (IR) architectures.

Recommended Application

PCIe Gen1, Gen2, Gen3, Gen4 Server Clock

Output Features

• 2-100MHz push-pull Low-power (LP) HCSL BCLK pairs

• Integrated terminations for 85Ω Zout

• 1 - 3.3V 25MHz LVCMOS REF output

Key Specifications

• BCLK outputs:

• Cycle-to-cycle jitter <50ps

• Output-to-output skew <50ps

• PCIe Gen1, Gen2, Gen3, Gen4 CC compliant

• PCIe Gen2, Gen3 IR compliant

• QPI/UPI compliant

• SAS12G compliant (SSC off)

• 12k-20M phase jitter <2ps rms (SSC off)

• REF output:

• Phase jitter <200fs rms (SSC off)

• ±50ppm frequency accuracy on all clocks

Features/Benefits

• Direct connection to 85 transmission lines; saves 8

resistors and 14mm2 compared to standard HCSL

• 112mW typical power consumption; eases thermal

concerns @ 1/10 the power of CK420BQ

• Contains default configuration; SMBus interface not

required for device operation

• OE# pins; support BCLK power management

• 25MHz input frequency; standard crystal

• 25MHz REF output; eliminates XO from board

• Pin/SMBus selectable 0%, -0.25% or -0.5% spread on

BCLK outputs; minimize EMI and phase jitter for each

application

• BCLK outputs blocked until PLL is locked; clean system

start-up

• Two selectable SMBus addresses; multiple devices can

easily share an SMBus segment

• Space saving 24-pin 4x4mm VFQFPN; minimal board

space

Block Diagram

p

XIN/CLKIN_25

X2

vSS_EN_tri

^CKPWRGD_PD#

SDATA_3.3

REF

vOE(1:0)#

SCLK_3.3

vSADR

2

SSC

Capable

PLL

Control

Logic

BCLK1

BCLK0

类似零件编号 - 9SQL4952BNLGI

制造商	部件名	数据表	功能描述
Renesas Technology Corp	9SQL4952	424Kb / 30P	3.3V PCIe® Gen1–5 and UPI Clock Generator Family February 19, 2020
	9SQL4952CNLGI	424Kb / 30P	3.3V PCIe® Gen1–5 and UPI Clock Generator Family February 19, 2020
	9SQL4952CNLGI8	424Kb / 30P	3.3V PCIe® Gen1–5 and UPI Clock Generator Family February 19, 2020

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