4-OUTPUT CK420BQ DERIVATIVE

2

DECEMBER 12, 2016

9SQL4954 DATASHEET

Pin Configuration

SMBus Address Selection Table

Power Management Table

Power Connections

32 31 30 29 28 27 26 25

GNDXTAL 1

24 vOE2#

XIN/CLKIN_25 2

23 BCLK2#

X2 3

22 BCLK2

VDDXTAL3.3 4

21 VDDA3.3

VDDREF3.3 5

20 GNDA

vSADR/REF3.3 6

19 BCLK1#

GNDREF 7

18 BCLK1

GNDDIG 817 vOE1#

9 10111213141516

9SQL4954

connect

epad to GND

32-pin VFQFPN, 5x5 mm, 0.5mm pitch

v prefix indicates internal 120KOhm pull down resistor

^ prefix indicates internal 120KOhm pull up resistor

SADR

Address

0

1101000

1

1101010

State of SADR on first application

of CKPWRGD_PD#

+

Read/Write Bit

x

x

True O/P

Comp. O/P

0X

X

1

1

0

Running

Running

Running

11

1

Running

10

X

1. The output state is set by B11[1:0] (Low/Low default)

3. Input polarities defined at default SMBus values.

4. See SMBus description for Byte 3, bit 4

2. REF is Hi-Z until the 1st assertion of CKPWRGD_PD# high. After this, when

CKPWRG_PD# is low, REF is disabled unless Byte3[5]=1, in which case REF is

running..

CKPWRGD_PD#

SMBus

OE bit

OEx#

Pin

BCLKx

REF

Pin Number

VDD

GND

41

57

98, 30

16, 25

15, 26, 33

21

20

PLL Analog

REF Output

Description

XTAL Analog

Digital Power

BCLK outputs