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9SQL4958BNDGI8 数据表(PDF) 6 Page - Integrated Device Technology

部件名 9SQL4958BNDGI8
功能描述  8-output CK420BQ Derivative
PDF  20 Pages
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制造商  IDT [Integrated Device Technology]
网页  http://www.idt.com
标志 IDT - Integrated Device Technology

9SQL4958BNDGI8 数据表(HTML) 6 Page - Integrated Device Technology

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8-OUTPUT CK420BQ DERIVATIVE
6
OCTOBER 28, 2016
9SQL4958 DATASHEET
Electrical Characteristics–Input/Supply/Common Parameters–Normal Operating
Conditions
TA = TAMB; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Supply Voltage
VDDxxx
Supply voltage for core, analog and single-ended
LVCMOS outputs.
3.135
3.3
3.465
V
IO Supply Voltage
VDDIO
Supply voltage for differential Low Power outputs.
0.9975
1.05-3.3
3.465
V
Ambient Operating
Temperature
TAMB
Industrial range
-40
25
85
°C
Input High Voltage
VIH
0.75 VDDx
VDDx +
0.3
V
Input Low Voltage
VIL
-0.3
0.25 VDDx
V
Input High Voltage
VIHtri
0.75 VDDx
VDD + 0.3
V
Input Mid Voltage
VIMtri
0.4 VDDx 0.5 VDDx
0.6 VDDx
V
Input Low Voltage
VILtri
-0.3
0.25 VDDx
V
IIN
Single-ended inputs, VIN = GND, VIN = VDD
-5
5
uA
IINP
Single-ended inputs
VIN = 0 V; Inputs with internal pull-up resistors
VIN = VDD; Inputs with internal pull-down resistors
-50
50
uA
Input Frequency
Fin
XTAL, or X1 input
25
MHz
Pin Inductance
Lpin
7nH
1
CIN
Logic Inputs, except DIF_IN
1.5
5
pF
1
COUT
Output pin capacitance
6
pF
1
Clk Stabilization
TSTAB
From VDD Power-Up and after input clock
stabilization or de-assertion of PD# to 1st clock
0.35
1.8
ms
1,2
SS Modulation Frequency
fMOD
(Triangular Modulation)
30
31.6
33
kHz
1
OE# Latency
tLATOE#
DIF start after OE# assertion
DIF stop after OE# deassertion
12
3
clocks
1,3
Tdrive_PD#
tDRVPD
DIF output enable after
PD# de-assertion
28
300
us
1,3
Tfall
tF
Fall time of single-ended control inputs
5
ns
1,2
Trise
tR
Rise time of single-ended control inputs
5
ns
1,2
Notes
1 Guaranteed by design and characterization, not 100% tested in production.
2 Control input must be monotonic from 20% to 80% of input swing.
Single-ended inputs, except SMBus
Single-ended tri-level inputs ('_tri' suffix)
Input Current
Capacitance
3 Time from deassertion until outputs are >200 mV



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