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MM5486 数据表(PDF) 2 Page - National Semiconductor (TI) |
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MM5486 数据表(HTML) 2 Page - National Semiconductor (TI) |
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2 / 8 page ![]() Absolute Maximum Ratings If MilitaryAerospace specified devices are required please contact the National Semiconductor Sales OfficeDistributors for availability and specifications Voltage at Any Pin VSS to VSS a12V Operating Temperature b 25 Cto a85 C Storage Temperature b 65 Cto a150 C Power Dissipation at 25 C Molded DIP Package Board Mount 25W Molded DIP Package Socket Mount 23W Junction Temperature a 150 C Lead Temperature (Soldering 10 seconds) 300 C Molded DIP Package Board Mount iJA e 49 CW Derate 204 mW C above 25 C Molded DIP Package Socket Mount iJA e 54 CW Derate 185 mW C above 25 C Electrical Characteristics TA within operating range VDD e 475V to 110V VSS e 0V unless otherwise specified Symbol Parameter Conditions Min Typ Max Units VDD Power Supply 475 11 V IDD Power Supply Current Excluding Output Loads 7 mA Input Voltages VIL Logic ‘‘0’’ Level g 10 mA Input Bias b 03 08 V VIH Logic ‘‘1’’ Level 475 s VDD s 525 22 VDD V VDD l 525 VDDb2VDD V IBR Brightness Input (Note 2) 0 075 mA Output Sink Current (Note 3) IOH Segment OFF VOUT e 30V 10 m A IOL Segment ON VOUT e 1V (Note 4) Brightness Input e 0 mA0 10 m A Brightness Input e 100 mA 20 27 4 mA Brightness Input e 750 mA15 25 mA IO Maximum Segment Current 40 mA VIBR Brightness Input Voltage (Pin 19) Input Current e 750 mA 30 43 V OM Output Matching (Note 1) g 20 % Data Output VOL Logical ‘‘0’’ Level IOUT e 05 mA VSS 04 V VOH Logical ‘‘1’’ Level IOUT e 100 mA 24 VDD V Clock Input (Notes 5 and 6) fC Frequency 500 kHz th High Time 950 ns tl Low Time 950 ns Data Input tDS Set-Up Time 300 ns tDH Hold Time 300 ns Note 1 Output matching is calculated as the percent variation (IMAX aIMIN)2 Note 2 With a fixed resistor on the brightness input pin some variation in brightness will occur from one device to another Maximum brightness input current can be 2 mA as long as Note 3 and junction temperature equation are complied with Note 3 Absolute maximum for each output should be limited to 40 mA Note 4 The VOUT voltage should be regulated by the user See Figures 6 and 7 for allowable VOUT vs IOUT operation Note 5 AC input waveform specification for test purpose tr s 20 ns tf s 20 ns f e 500 kHz 50% g10% duty cycle Note 6 Clock input rise and fall times must not exceed 300 ns 2 |
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