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LCP154DJF

Technical information

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Technical information

Figure 4. Example of PCB layout based on LCP154DJF protection

Figure 4 shows the classical PCB layout used to optimize line protection. The 2 mm

distance is used to comply with IEC/UL 60950 clearance requirements.

The capacitor C is used to speed up the crowbar structure firing during the fast surge edges.

This allows minimization of the dynamic breakover voltage at the SLIC Tip and Ring inputs

during fast strikes. Note that this capacitor is generally present around the SLIC - Vbat pin.

So to be efficient it has to be as close as possible from the LCP Gate pin and from the

reference ground track (or plan).

The schematics of Figure 5 give the topology used to protect all SLICs according to ITU-T

K20/21/45 and GR1089-Core.

Figure 5. Protection of high voltage SLIC

GND

GND

To

SLIC

side

To

line side

100 nF

>2 mm