AD9261 datasheet(21/29 Pages) AD

21 / 29 page

AD9261

Rev. 0 | Page 20 of 28

Sample Rate Converter

The sample rate converter (SRC) allows the flexibility of a user-

defined output sample rate, enabling a more efficient and direct

interface to the digital receiver blocks.

The sample rate converter performs an interpolation and

resampling procedure to provide an output data rate of

20 MSPS to 168 MSPS. Table 16 and Table 17 detail the coeffi-

cients for the INT1 and INT2 filters. The sinc filters are a

standard implementation.

Table 16. INT1 Filter Coefficients

Coefficient

Number

Coefficient

Number

Coefficient

C0, C26

C7, C19

C1, C25

C8, C18

2450

C2, C24

−97

C9, C17

C3, C23

C10, C16

−5761

C4, C22

361

C11, C15

C5, C21

C12, C14

20433

C6, C20

−1017

C13

32768

Table 17. INT2 Filter Coefficients

Coefficient

Number

Coefficient

Number

Coefficient

C0, C14

−27

C4, C10

−1032

C1, C13

C5, C9

C2, C12

227

C6, C8

4928

C3, C11

8192

The relationship between the output sample rate and the Σ-Δ

modulator clock rate is expressed as follows:

fOUT = fMOD ÷ KOUT

Table 18 shows the available KOUT conversion factors.

If the main clocking source of the AD9261 is provided by the

PLL, it is important that once the PLL has been programmed

and locked, to initiate an SRC reset before programming the

desired KOUT factor. This is done by first writing 0x101[5:0] = 0

and then rewriting to the same register with the appropriate

KOUT value. In addition, if the AD9261 loses its clock source and

then later regains it, an SRC reset should be initiated.

Table 18. SRC Conversion Factors

0x101[5:0]

KOUT

0x101[5:0]

KOUT

0x101[5:0]

KOUT

SRC reset

11.5

22.5

12.5

23.5

13.5

24.5

14.5

25.5

4.5

15.5

26.5

5.5

16.5

27.5

6.5

17.5

28.5

7.5

18.5

29.5

8.5

19.5

30.5

9.5

20.5

31.5

10.5

21.5

Cascaded Filter Responses

The cascaded filter responses for the three signal bandwidth

settings are for a 160 MSPS output data rate, as shown in Figure 47,

Figure 48, and Figure 49.

102030

40506070

–160

–140

–120

–100

–80

–60

–40

–20

FREQUENCY (MHz)

–0.08

–0.04

0.04

0.08

FREQUENCY (MHz)

Figure 47. 10 MHz Signal Bandwidth, 160 MSPS

AD9261 数据表(PDF) 21 Page - Analog Devices

AD9261 数据表(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29

数据表下载

链接网址

AD9261 数据表(PDF) 21 Page - Analog Devices

AD9261 数据表(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29

数据表 下载

链接网址

数据表下载