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STMPE1600 数据表(PDF) 7 Page - STMicroelectronics |
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STMPE1600 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 27 page ![]() STMPE1600 I2C block Doc ID 16938 Rev 3 7/27 For the bus master to communicate to the slave device, the bus master must initiate a Start condition and followed by the slave device address. Accompanying the slave device address, there is a Read/Write bit (R/W). The bit is set to 1 for Read and 0 for write operation. If a match occurs on the slave device address, the corresponding device gives an acknowledge on the SDA during the 9th bit time. If there is no match, it deselects itself from the bus by not responding to the transaction. Figure 4. I2C timing Table 3. Eight programmable slave addresses A2 A1 A0 Slave device address (7-bit or 10-bit addressing) 0 0 0 42h 0 0 1 43h 0 1 0 44h 0 1 1 45h 1 0 1 46h 1 0 1 47h 1 1 0 48h 1 1 1 49h |
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