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TDA7718B 数据表(PDF) 12 Page - STMicroelectronics |
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TDA7718B 数据表(HTML) 12 Page - STMicroelectronics |
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12 / 40 page ![]() Electrical specifications TDA7718B 12/40 DocID18305 Rev 3 DC offset detection circuit Vth Zero comp. window size V1 ±10 ±25 ±40 mV V2 ±30 ±50 ±70 mV V3 ±50 ±75 ±100 mV V4 ±70 ±100 ±130 mV tsp Max rejected spike length -2 11 30 µs - 5 22 50 µs -10 33 70 µs -15 44 90 µs ICHDCErr DCErr charge current - 2 5 8 µA IDISDCErr DCErr discharge current - 4 5 9 mA VOutH DCErr high voltage - 3 3.3 3.6 V VOutL DCErr low voltage - - 100 300 mV General eNO Output noise BW=20 Hz to 20 kHz A- Weighted, all gain = 0 dB -12 22 µV BW=20 Hz - 20 kHz A- Weighted, Output muted - 7 12 µV S/N Signal to noise ratio all gain = 0 dB, A-weighted; Vo = 2 VRMS 98 104 - dB DDistortion VIN =1 VRMS; all stages 0 dB - 0.01 0.1 % SC Channel separation left/right - - 90 - dB Table 5. Electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit |
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