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MAX1839EEP 数据表(PDF) 20 Page - Maxim Integrated Products |
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MAX1839EEP 数据表(HTML) 20 Page - Maxim Integrated Products |
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20 / 26 page ![]() Wide Brightness Range CCFL Backlight Controllers 20 ______________________________________________________________________________________ transient that CCCV is designed to protect against is open tube at the beginning of DPWM pulses. Large CCCV values reduce transient overshoots, but can cause loss of regulation at low DPWM duty cycles by increasing the delay to strike voltage. Smaller values of CCCV allow quicker DPWM startups and faster response to fault conditions. Very small values of CCCV make the circuit more susceptible to ringing, and in extreme cases may cause instability. Some ringing is expected between the Royer oscillator and the buck inductor. Some of the ringing can be suppressed by adding a capacitor in parallel with R5. This capacitor should be chosen such that: 1 / (2 ✕ π ✕ R5 ✕ C) = ringing frequency When using high DPWM frequencies and low DPWM duty cycles, the DPWM on-time is reduced. In some cases, this causes the lamp current transient to exceed the DPWM on-time. In this case, the MAX1739/ MAX1839 lose regulation and the lamp current never reaches the lamp current set point. Supply rejection while operating in this condition is degraded. If the DPWM on-time is short enough, the lamp current does not have enough time to reach the lamp-out threshold and causes a lamp-out detection. To prevent this, decrease the turn-on transient duration (by lowering CCCV), increase the DPWM duty cycle (by limiting the brightness code), or decrease the DPWM frequency (see Synchronizing the DPWM Frequency). DPWM or other “chopping” methods can cause audible noise from some transformers. The transformer should be carefully designed to avoid such behavior. Dimming Range The external components required to achieve a dim- ming range are highly dependent on the CCFL used. The standard application circuit uses a CCFL with strin- gent requirements. To achieve a 20:1 dimming range, the standard circuit drops slightly more voltage across C6 as it does across the CCFL at the full lamp current setting. This ensures good stability in that circuit with VMINDAC as low as 1V. To further increase the dimming range when using this CCFL, C6 must be increased, which increases the maximum secondary transformer voltage and requires a transformer with a higher volt- age rating. Other components (such as the primary transformer inductance and C7) may also need to be adjusted to maintain good waveforms, Royer efficiency, and the desired Royer frequency. Other Components The high-side MOSFET driver is powered by the exter- nal boosting circuit formed by C5 and D2. Connect BST through a signal-level Schottky diode to VL, and bypass it to LX with a 0.1µF ceramic capacitor. This cir- cuit delivers the necessary power to drive N1 as shown in Figure 8. If a higher gate capacitance MOSFET is used, the size of the bypass capacitor must be increased. The current need at BST is as follows: IBST = 1mA d + QT ✕ f where d is the buck controller duty cycle (98% max), QT is the MOSFET total gate charge, and f is twice the Royer oscillator frequency. The maximum current through D2 (ID) is: ID = IBST / (1 - d) D5A and D5B are used to generate the current-sense voltage across R13. The current through these diodes is the lamp current; use a dual-series signal-level diode. Bypassing and Board Layout Connect C4 from VL to GND as close as possible with dedicated traces that are not shared with other signal paths. The ground lines should terminate at the GND end of C4: quiet ground, power ground, and lamp cur- rent-sense ground. Quiet ground is used for REF, CCV, R5, and MINDAC (if a resistor-divider is used). The power ground goes from the ground of C4 directly to the ground side of C9. Power ground should also sup- ply the return path for D1, N2, and the buck current- sense resistor (from CS to GND, if used). The ground path for R13 should be separate to ensure that it does not corrupt quiet ground and it is not affected by DC drops in the power ground. Refer to the MAX1739 EV kit for an example of good layout. Digital Interface (MAX1739) With MODE connected to VL, the CRF/SDA and CTL/SCL pins no longer behave as analog inputs; instead, they function as SMBus-compatible 2-wire dig- ital interfaces. CRF/SDA is the bidirectional data line, and CTL/SCL is the clock line of the 2-wire interfaces corresponding, respectively, to the SMBDATA and SMBCLK lines of the SMBus. The MAX1739 uses the write-byte, read-byte, and receive-byte protocols (Figure 11). The SMBus protocols are documented in System Management Bus Specification v1.08 and are available at www.sbs-forum.org. The MAX1739 is a slave-only device and responds to the 7-bit address 0b0101101 (i.e., with the RW bit clear indicating a write, this corresponds to 0x5A). The MAX1739 has three functional registers: a 5-bit bright- ness register (BRIGHT4–BRIGHT0), a 3-bit shutdown mode register (SHMD2–SHMD0), and a 2-bit status register (STATUS1–STATUS0). In addition, the device |
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