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PI6CV855L 数据表(PDF) 4 Page - Pericom Semiconductor Corporation |
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PI6CV855L 数据表(HTML) 4 Page - Pericom Semiconductor Corporation |
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4 / 9 page ![]() 4 PS8545 06/20/01 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI6CV855 PLL Clock Driver for 2.5V SSTL 2 DDR SDRAM Memory l o b m y Sr e t e m a r a P. n i M. m o N. x a Ms ti n U V A D D e g a tl o v y l p p u s e r o c / g o l a n A3 . 25 . 27 . 2 V V Q D D e g a tl o v y l p p u s t u p t u O3 . 25 . 27 . 2 V H O e g a tl o v t u p t u o l e v el - h g i H8 . 1V Q D D V L O e g a tl o v t u p t u o l e v el - w o L0 5 . 0 V X I e g a tl o v g n i s s o r c ri a p -l ai t n e r e ff i d t u p n IV ( Q D D 2 . 0 ) 2 /V ( Q D D 2 . 0 + ) 2 / V X O t u p n i k c o l c M A R D S e h t t a e g a tl o v g n i s s o r c ri a p -l ai t n e r e ff i d t u p t u OV ( Q D D 2 . 0 ) 2 /V ( Q D D 2 . 0 + ) 2 / V N I l e v el e g a tl o v t u p n I3 . 0 V Q D D 3 . 0 + V D I K L C d n a K L C n e e w t e b e g a tl o v l ai t n e r e ff i d t u p n I6 3 . 0V Q D D 6 . 0 + V D O T U O B F d n a ] n [ Y d n a ] n [ Y n e e w t e b e g a tl o v l ai t n e r e ff i d t u p t u O T U O B F d n a 7 . 0V Q D D 6 . 0 + TA e r u t a r e p m e t ri a e e rf g n it a r e p O0 0 7C ° DCSpecifications Recommended Operating Conditions r e t e m a r a Ps n o it i d n o C t s e TA D D V V , Q D D . n i M. p y T. x a Ms ti n U V K I st u p n i ll AII A m 8 1 =V 3 . 22 . 1 V II N I B F , K L CVI V = Q D D D N G r oV 7 . 20 1 ±A µ I Q D D V f o t n e rr u c y l p p u s ci m a n y D Q D D V D D V 7 . 2 = ) 1 ( 0 0 3A m t n e rr u c y l p p u s ci t a t Sz H M 0 2 < K L C & K L C0 0 1A µ I D D A V A f o t n e rr u c y l p p u s ci m a n y D D D V D D V 7 . 2 = ) 1 ( 2 1A m t n e rr u c y l p p u s ci t a t Sz H M 0 2 < K L C & K L C0 0 1A µ CI K L C d n a K L C VI V = D D D N G r oV 5 . 20 . 20 . 3F p N I B F d n a N I B F ElectricalCharacteristics Notes: 1. Driving 9 or 18 DDR SDRAM memory chips with 120-ohm termination resistor for each clock output pair at 134 MHz. 2. The maximum power down clock frequency is below 20 MHz. |
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