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ACE24AC512 数据表(PDF) 7 Page - ACE Technology Co., LTD. |
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ACE24AC512 数据表(HTML) 7 Page - ACE Technology Co., LTD. |
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7 / 16 page ![]() ACE24AC512 Two-wire Serial EEPROM VER 1.1 7 rolls over to the beginning of the memory array address. Similar to current address read, the m icro- controller can terminate the sequential read by not acknowledging the last data word received, but sending a stop bit afterwards instead (figure 6). (C) Random Read Random read is a two-steps process. The first step is to initialize the internal address counter with a target read address using a “dummy write” instruction. The second step is a current address read. To initialize the internal address counter with a target read address, the micro-controller issues a start bit first, follows by a valid device address with the read/write bit (8 th) set to “0”. The EEPROM will then acknowledge. The micro-controller will then send two address words. Again the EEPROM will acknowledge. Instead of sending a valid written data to the EEPROM, the micro-controller performs a current address read instruction to read the data. Note that once a start bit is issued, the EEPROM will reset the internal programming process and continue to execute the new instruction - which is to read the current address (figure 7). Figure 3: Byte Write Figure 4: Page Write Figure 5: Current Address Read |
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