R5F104FDA datasheet(22/213 Pages) RENESAS

22 / 213 page

RL78/G14

1. OUTLINE

R01DS0053EJ0330 Rev. 3.30

Page 22 of 208

Aug 12, 2016

• 100-pin plastic LQFP (14

× 20 mm, 0.65 mm pitch)

Note

Mounted on the 384 KB or more code flash memory products.

Caution 1. Make EVSS0, EVSS1 pins the same potential as VSS pin.

Caution 2. Make VDD pin the potential that is higher than EVDD0, EVDD1 pins (EVDD0 = EVDD1).

Caution 3. Connect the REGC pin to VSS pin via a capacitor (0.47 to 1

μF).

Remark 1.

For pin identification, see 1.4 Pin Identification.

Remark 2.

When using the microcontroller for an application where the noise generated inside the microcontroller must be reduced,

it is recommended to supply separate powers to the VDD, EVDD0 and EVDD1 pins and connect the VSS, EVSS0 and EVSS1

pins to separate ground lines.

Remark 3.

Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection register 0, 1

(PIOR0, 1).

P146/(INTP4)

P111

P110/(INTP11)

P101

P10/SCK11/SCL11/TRDIOD1

P11/SI11/SDA11/TRDIOC1/(RxD0_1) Note

P12/SO11/TRDIOB1/IVREF1/(INTP5)/(TxD0_1) Note

P13/TxD2/SO20/TRDIOA1/IVCMP1

P14/RxD2/SI20/SDA20/TRDIOD0/(SCLA0)

P15/SCK20/SCL20/TRDIOB0/(SDAA0)

P16/TI01/TO01/INTP5/TRDIOC0/IVREF0/(SI00)/(RxD0)

P17/TI02/TO02/TRDIOA0/TRDCLK/IVCMP0/(SO00)/(TxD0)

P57/(INTP3)

P56/(INTP1)

P55/(PCLBUZ1)/(SCK00)

P54/SCK31/SCL31

P53/SI31/SDA31

P52/SO31

P51/SO00/TxD0/TOOLTxD/TRGIOB

P50/SI00/RxD0/TOOLRxD/SDA00/TRGIOA/(TRJO0)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

100

P120/ANI19/VCOUT0

P47/INTP2

P46/INTP1

P45/SO01

P44/SI01/SDA01

P43/SCK01/SCL01

P42

P41/(TRJIO0)

P40/TOOL0

RESET

P124/XT2/EXCLKS

P123/XT1

P137/INTP0

P122/X2/EXCLK

P121/X1

REGC

VSS

EVSS0

VDD

EVDD0

RL78/G14

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