VIPER38HDTR datasheet(17/31 Pages) STMICROELECTRONICS

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VIPER38

Operation

7.4

Power-down

At converter power-down, the system loses its ability to regulate as soon as the decreasing

input voltage is low enough for the peak current limitation to be reached. The VDD voltage

drops and when it falls below the VDDoff threshold (see Table 7: Supply section) the power

MOSFET is switched OFF, the energy transfers to the IC is interrupted and, consequently,

the VDD voltage decreases (Table 19: Soft-start: timing diagram), the startup sequence is

inhibited and the power-down is completed. This feature is useful as it prevents the

converter from attempting a restart and ensures monotonic output voltage decay during

system power-down.

7.5

Auto-restart

Every time a protection is tripped, the IC is automatically restarted after a duration that

depends on the discharge and recharge of the CVDD capacitor. As shown in Figure 20:

Timing diagram: behavior after short-circuit, after a fault the IC is stopped and,

consequently, the VDD voltage decreases because of the IC's consumption. As soon as the

VDD voltage falls below the threshold VDD(RESTART) and if the DC input voltage is higher

than VDRAIN_START threshold, the internal HV current source is turned ON and it starts to

charge the CVDD capacitor with the current IDDch2 (0.6 mA, typ). As soon as the VDD voltage

reaches the threshold VDD(ON), the IC restarts.

Figure 20. Timing diagram: behavior after short-circuit

7.6

Oscillator

The switching frequency is internally fixed to 60 kHz or 115 kHz. In both cases the switching

frequency is modulated by approximately ±4 kHz (60 kHz version) or ±8 kHz (115 kHz

version) at 920 Hz (typical) rate, so that the resulting spread-spectrum action distributes the

energy of each harmonic of the switching frequency over a number of side-band harmonics

having the same energy on the whole, but smaller amplitudes.

VIPER38HDTR 数据表(PDF) 17 Page - STMicroelectronics