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R5F564MFDDFB 数据表(PDF) 21 Page - Renesas Technology Corp

部件名 R5F564MFDDFB
功能描述  120-MHz 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 4-MB flash memory
PDF  228 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R5F564MFDDFB 数据表(HTML) 21 Page - Renesas Technology Corp

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RX64M Group
1. Overview
R01DS0173EJ0110 Rev.1.10
Page 21 of 228
Oct 24, 2016
Serial communications
interface (SCIg)
 Asynchronous mode/clock synchronous mode
SCK0 to SCK7
I/O
Input/output pins for the clock
RXD0 to RXD7
Input
Input pins for received data
TXD0 to TXD7
Output
Output pins for transmitted data
CTS0# to CTS7#
Input
Input pins for controlling the start of transmission and reception
RTS0# to RTS7#
Output
Output pins for controlling the start of transmission and
reception
 Simple I2C mode
SSCL0 to SSCL7
I/O
Input/output pins for the I2C clock
SSDA0 to SSDA7
I/O
Input/output pins for the I2C data
 Simple SPI mode
SCK0 to SCK7
I/O
Input/output pins for the clock
SMISO0 to SMISO7
I/O
Input/output pins for slave transmission of data
SMOSI0 to SMOSI7
I/O
Input/output pins for master transmission of data
SS0# to SS7#
Input
Chip-select input pins
Serial communications
interface (SCIh)
 Asynchronous mode/clock synchronous mode
SCK12
I/O
Input/output pin for the clock
RXD12
Input
Input pin for received data
TXD12
Output
Output pin for transmitted data
CTS12#
Input
Input pin for controlling the start of transmission and reception
RTS12#
Output
Output pin for controlling the start of transmission and reception
 Simple I2C mode
SSCL12
I/O
Input/output pin for the I2C clock
SSDA12
I/O
Input/output pin for the I2C data
 Simple SPI mode
SCK12
I/O
Input/output pin for the clock
SMISO12
I/O
Input/output pin for slave transmission of data
SMOSI12
I/O
Input/output pin for master transmission of data
SS12#
Input
Chip-select input pin
 Extended serial mode
RXDX12
Input
Input pin for received data
TXDX12
Output
Output pin for transmitted data
SIOX12
I/O
Input/output pin for received or transmitted data
Serial communications
interface with FIFO
(SCIFA)
SCK8 to SCK11
I/O
Input/output pins for the clock
RXD8 to RXD11
Input
Input pins for received data
TXD8 to TXD11
Output
Output pins for transmitted data
CTS8# to CTS11#
Input
Input pins for controlling the start of transmission and reception
RTS8# to RTS11#
Output
Output pins for controlling the start of transmission and
reception
I2C bus interface
SCL0[FM+], SCL2
I/O
Input/output pins for clocks. Bus can be directly driven by the N-
channel open drain
SDA0[FM+], SDA2
I/O
Input/output pins for data. Bus can be directly driven by the N-
channel open drain
Table 1.4
Pin Functions (4/8)
Classifications
Pin Name
I/O
Description



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