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M052LDN 数据表(PDF) 82 Page - List of Unclassifed Manufacturers

部件名 M052LDN
功能描述  32-bit Microcontroller
PDF  86 Pages
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制造商  ETC2 [List of Unclassifed Manufacturers]
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标志 ETC2 - List of Unclassifed Manufacturers

M052LDN 数据表(HTML) 82 Page - List of Unclassifed Manufacturers

Back Button M052LDN Datasheet HTML 78Page - List of Unclassifed Manufacturers M052LDN Datasheet HTML 79Page - List of Unclassifed Manufacturers M052LDN Datasheet HTML 80Page - List of Unclassifed Manufacturers M052LDN Datasheet HTML 81Page - List of Unclassifed Manufacturers M052LDN Datasheet HTML 82Page - List of Unclassifed Manufacturers M052LDN Datasheet HTML 83Page - List of Unclassifed Manufacturers M052LDN Datasheet HTML 84Page - List of Unclassifed Manufacturers M052LDN Datasheet HTML 85Page - List of Unclassifed Manufacturers M052LDN Datasheet HTML 86Page - List of Unclassifed Manufacturers  
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 82 / 86 page
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M051 DN/DE
Oct. 05, 2015
Page 82 of 86
Rev 1.03
SPI Dynamic Characteristics
9.6
9.6.1
Dynamic Characteristics of Data Input and Output Pin
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
SPI MASTER MODE (VDD = 4.5 V~5.5V, 30 PF LOADING CAPACITOR)
tW(SCKH)
tW(SCKL)
SPI high and low time, peripheral clock
= 20MHz
22.5
-
27.5
ns
tDS
Data input setup time
0
-
-
ns
tH(MI)
Data input hold time
5
-
-
ns
tV
Data output valid time
-
1
2
ns
tH(MO)
Data output hold time
1
-
-
ns
SPI MASTER MODE (VDD = 3.0~3.6 V, 30 PF LOADING CAPACITOR)
tW(SCKH)
tW(SCKL)
SPI high and low time, peripheral clock
= 20MHz
22.5
-
27.5
ns
tDS
Data input setup time
0
-
-
ns
tH(MI)
Data input hold time
4
-
-
ns
tV
Data output valid time
0
1
ns
tH(MO)
Data output hold time
1
-
-
ns



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