www.powerint.com

A

3/04

Power Integrations

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DI-35

The PI logo, TOPSwitch, TinySwitch, LinkSwitch and EcoSmart are registered trademarks of Power Integrations. PI Expert and DPA-Switch

are trademarks of Power Integrations. Copyright 2004, Power Integrations

Power Integrations may make changes to its products at any time. Power Integrations has no liability arising from your use of any information, device or circuit described

herein nor does it convey any license under its patent rights or the rights of others. POWER INTEGRATIONS MAKES NO WARRANTIES HEREIN AND SPECIFICALLY

DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,

AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. The products and applications illustrated herein (including circuits external to the products and transformer

construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations.

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Table 1. Transformer Construction Information.

Figure 2. 115 VAC V-I Curve.

Figure 3. Load Current for Thermal Test. (10 ms/div)

TRANSFORMER PARAMETERS

Nippon Ceramic EF-25-NC-2H

A

2

Miles-Platts FE0100 with TBS-601

terminals

Primary: 65T, 2 layers, 28 AWG

Secondary: 9T, 2 x 26 AWG, Triple

Insulated

Bias: 8T, 2 x 28 AWG

Primary: 3-1, tape

Secondary: 9,10-6,7, tape,

Bias: 4-5, tape 3L

1059 µH ± 10%

0.75 MHz (Min)

28 µH (Max)

Core

Bobbin

Winding Details

Winding Order (pin numbers)

Primary Inductance

Primary Resonant Frequency

Leakage Inductance

THERMAL TEST RESULSTS

Test Case

T1 (Transformer)

U1 (TOP245P

D7 (Op Rectifier)

C8 (Op Capacitor)

T (°C) @

T (°C) @

85 VAC

265 VAC

57

59

64

51

58

59

41

40

Thermal test load current is 1 A for 30 ms, 2.2 A for 10 ms

Table 2. Thermal Test with Pulsed Load of Figure 3. 25

°C

Ambiant, Open Frame, 85 VAC and 265 VAC input.

01

1.5

0.5

2

2.5

15.5

15.6

15.1

15.2

15.3

15.4

15

15.9

16

15.7

15.8

16.1

0

50

100

1

4

3

5

2

Time (ms)

6

7

0

-1

2.2 A

1 A

• Keep power loop layouts (primary and secondary) tight to

minimize noise (EMI and output ripple) and power loss.

heatsinking.