А4

Internal Block Diagram

Fig 1

PIN CONFIGURATIONS

PIN

NAME

DESCRIPTION

1

RR

A resistor to ground provides a reference current for the transmit and receive attenuators

2

RTX

A resistor to ground determines the nominal gain of the transmit attenuator ,the transmit channel gain is

inversely proportional to RTX resistance.

3

TXI

Input to the transmit attenuator. Input resistance is nominally 5.0k ohms.

4

TXO

Output of the transmit attenuator. The TXO output signal drivers the input of transmit level detcetor, as well

as the external circuit which drivers the telephone line.

5

TLI

Input of the transmit level detector. An external resistor ac coupled to The TLI pin sets the detection level.

Decreasing this resistor increases the sensitivity to transmit channel signals.

6

TLO

Output of the transmit level detector. The external resistor and capacitor set the time the comparator will

hold the system in the transmit mode after speech ceases.

7

RLI

Input of the receive level detector. An external resistor ac coupled to The RLI pin sets the detection level.

Decreasing this resistor increases the sensitivity to receive channel signals

8

RLO

Output of the receive level detector. The external resistor and capacitor set the time the comparator will

hold the system in the receive mode after speech ceases

9

MCI

Microphone amplifier input. Input impedance is nominally 10k ohms and the dc bias voltage is

approximately equal to VB

10

MCO

Microphone amplifier output. The MIC amp gain is internally set at 34dB(50V/V)

11

CP1

A parallel resistor and capacitor connected between this pin and VCC holds a voltage corresponding

to the background noise level. The transmit detector compares the CP1 voltage with the speech signal from

12

CP2

A capacitor at this pin peak detects the speech signals for comparison with the background noise level held

at CP1.

13

XDI

Input to the transmit detector system. The microphone amplifier output is ac coupled to the XDI pin

through an external resistor

14

SKG

High current ground pin for the speaker amplifier output stage. The SKG voltage should be within

10mV of the ground voltage at pin 22

15

SKO

Speaker amplifier output. The SKO pin will source and sink up to 100mA when ac coupled to the

speaker. The speaker amplifier gain is internally set at 34dB(50V/V).

16

V+

Input DC supply voltage. V+ can be powered from Tip and Ring if an ac decoupling inductor is used to

prevent loading ac line signals. The required V+ voltage is 6.0V to 11V(7.5V nominal ) at 7.0mA

17

AGC

A capacitor from this pin to VB stabilizes the speaker amplifier gain control loop, and additionally

controls the attack and decay time of this circuit. The gain control loop limits the speaker amplifier input

to prevent clipping at SKO. The internal resistance at AGC pin is nominally 110k ohms.

18

CS

Digital chip select input. When at a logic "0" (<0.7V) the VCC regulator is enabled. When at a logic "1"

(>1.6V),the chip is in the standby mode drawing 0.5mA.An open CS pin is a logic "0". Input

Impedance is nominally 140k ohms. The input voltage should not exceed 11V

19

SKI

Input to the speaker amplifier. Input impedance is nominally 20k ohms

20

VCC

A 5.4V regulated output which powers all circuits except the speaker amplifier output stage

21

VB

An output voltage equal to approximately VCC/2 which series as an analog ground for the

speakerphone system. Up to 1.5mA of external load current may be sourced from VB. Output

impedance is 250 ohms. A filter capacitor is required

22

GND

Ground pin for the IC(except the speaker amplifier)

MIC

MIC AMP

TRANSMIT

CHANNEL

TRANSMIT

ATTENUATOR

TRANSMIT

OUTPUT

TRANSMIT

LEVEL

DETECTOR

SIDE

TONE

SIDE

TONE

RECEIVE LEVEL

DETECTOR

TRANSMIT/

RECEIVE

COMPARATOR

RECEIVE

ATTENUATOR

ATTENUATOR

CONTROL

SIGNAL/NOISE

DETECTOR

PEAK

LIMITER

SPEAKE

R AMP

RECEIVE

CHANNEL

SPE

AKE

R

Contek

RECEIVE VOLUME

CONTROL

ENABLE

INPUT

VCC

REGULATOR

RECEIVE

INPUT

DC INPUT

TELEPHONE

LINE