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X9428WPI 数据表(PDF) 13 Page - Xicor Inc. |
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X9428WPI 数据表(HTML) 13 Page - Xicor Inc. |
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13 / 20 page  X9428 Characteristics subject to change without notice. 13 of 20 REV 1.1.5 7/8/03 www.xicor.com A.C. TEST CONDITIONS EQUIVALENT A.C. LOAD CIRCUIT Circuit #3 SPICE Macro Model Input pulse levels VCC x 0.1 to VCC x 0.9 Input rise and fall times 10ns Input and output timing level VCC x 0.5 5V 1533 Ω 100pF SDA Output 2.7V 100pF 10pF RH RTOTAL CH 25pF CW CL 10pF RW RL AC TIMING (over recommended operating conditions) Symbol Parameter Min. Max. Unit fSCL Clock frequency 100 400 kHz tCYC Clock cycle time 2500 ns tHIGH Clock high time 600 ns tLOW Clock low time 1300 ns tSU:STA Start setup time 600 ns tHD:STA Start hold time 600 ns tSU:STO Stop setup time 600 ns tSU:DAT SDA data input setup time 100 ns tHD:DAT SDA data input hold time 30 ns tR SCL and SDA rise time 300 ns tF SCL and SDA fall time 300 ns tAA SCL low to SDA data output valid time 900 ns tDH SDA data output hold time 50 ns TI Noise suppression time constant at SCL and SDA inputs 50 ns tBUF Bus free time (prior to any transmission) 1300 ns tSU:WPA WP, A0, A1, A2 and A3 setup time 0 ns tHD:WPA WP, A0, A1, A2 and A3 hold time 0 ns |
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