iC-LFS

32x1 LINEAR IMAGE SENSOR

Rev A2, Page 2/10

DESCRIPTION

iC-LFS is an integrating light-to-voltage converter with

a single line of 32 pixels pitched at 63.5 µm (center-

to-center distance). Each pixel consists of a 56.4 µm

x 200 µm photodiode, an integration capacitor and a

sample and hold circuit.

The integrated control logic makes operation very sim-

ple, with only a start and clock signal necessary. A

third control input enables the integration period to be

paused at any time (electronic shutter).

With the start signal the hold mode is activated for all

pixels simultaneously with the next rising clock edge;

starting with pixel 1 the hold voltages are switched in

sequence to the push-pull output amplifier. The sec-

ond clock pulse deletes all integration capacitors and

the integration period starts again in the background

during the output phase. A run is complete after 32

clock pulses.

iC-LFS is suitable for high clock rates of up to 5 MHz.

If this is not required the supply current can be re-

duced via the external bias setting.

PACKAGING INFORMATION cDFN10 4 mm x 4 mm

PIN CONFIGURATION cDFN10 4 mm x 4 mm

1 2 3 4 5

6

7

8

9

10

dra_cdfn10-4x4-2_lfs_0_pack_3a, 7:1

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PIN FUNCTIONS

No. Name Function

1 SI

Start Integration Input

2 CLK

Clock Input

3 AO

Analogue Output

4 VDD

+5 V Digital Supply Voltage

5 VCC

+5 V Analogue Supply Voltage

6 RSET Bias Current (resistor from VCC to

RSET; when connected to GND the in-

ternal bias setting is activated)

7 n.c.

8 AGND Analogue Ground

9 GND

Digital Ground

10 DIS

Shutter control

The E-Pad is to be connected to a Ground Plane (AGND) on the PCB.