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LPC2114 数据表(PDF) 18 Page - NXP Semiconductors |
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LPC2114 数据表(HTML) 18 Page - NXP Semiconductors |
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18 / 34 page ![]() Philips Semiconductors LPC2114/LPC2124 Single-chip 16/32-bit microcontrollers Product data Rev. 03 — 22 December 2004 18 of 34 9397 750 13145 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 6.12 UARTs The LPC2114/LPC2124 each contain two UARTs. One UART provides a full modem control handshake interface, the other provides only transmit and receive data lines. 6.12.1 Features • 16 byte Receive and Transmit FIFOs. • Register locations conform to ‘550 industry standard. • Receiver FIFO trigger points at 1, 4, 8, and 14 bytes • Built-in baud rate generator. • Standard modem interface signals included on UART1. 6.13 I2C serial I/O controller I2C is a bi-directional bus for inter-IC control using only two wires: a serial clock line (SCL), and a serial data line (SDA). Each device is recognized by a unique address and can operate as either a receiver-only device (e.g. an LCD driver or a transmitter with the capability to both receive and send information (such as memory). Transmitters and/or receivers can operate in either master or slave mode, depending on whether the chip has to initiate a data transfer or is only addressed. I2C is a multi-master bus, it can be controlled by more than one bus master connected to it. I2C implemented in LPC2114/LPC2124 supports bit rate up to 400 kbit/s (Fast I2C). 6.13.1 Features • Standard I2C compliant bus interface. • Easy to configure as Master, Slave, or Master/Slave. • Programmable clocks allow versatile rate control. • Bidirectional data transfer between masters and slaves. • Multi-master bus (no central master). • Arbitration between simultaneously transmitting masters without corruption of serial data on the bus. • Serial clock synchronization allows devices with different bit rates to communicate via one serial bus. • Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer. • The I2C bus may be used for test and diagnostic purposes. 6.14 SPI serial I/O controller The LPC2114/LPC2124 each contain two SPIs. The SPI is a full duplex serial interface, designed to be able to handle multiple masters and slaves connected to a given bus. Only a single master and a single slave can communicate on the interface during a given data transfer. During a data transfer the master always sends a byte of data to the slave, and the slave always sends a byte of data to the master. |
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