AD7770_17 datasheet(3/98 Pages) AD

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AD7770

Data Sheet

Rev. C | Page 2 of 97

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Revision History ............................................................................... 4

Functional Block Diagram .............................................................. 5

Specifications..................................................................................... 6

DOUTx Timing Characterististics........................................... 10

SPI Timing Characterististics ................................................... 11

Synchronization Pins and Reset Timing Characteristics...... 12

SAR ADC Timing Characterististics ....................................... 13

GPIO SRC Update Timing Characterististics......................... 13

Absolute Maximum Ratings.......................................................... 14

Thermal Resistance .................................................................... 14

ESD Caution................................................................................ 14

Pin Configuration and Function Descriptions........................... 15

Typical Performance Characteristics ........................................... 18

Terminology .................................................................................... 31

Theory of Operation ...................................................................... 33

Analog Inputs.............................................................................. 33

Transfer Function ....................................................................... 34

Core Signal Chain....................................................................... 35

Capacitive PGA........................................................................... 35

Internal Reference and Reference Buffers............................... 35

Integrated LDOs ......................................................................... 36

Clocking and Sampling.............................................................. 36

Digital Reset and Synchronization Pins .................................. 36

Digital Filtering........................................................................... 37

Shutdown Mode.......................................................................... 37

Controlling the AD7770 ............................................................ 38

Pin Control Mode....................................................................... 38

SPI Control.................................................................................. 40

Digital SPI.................................................................................... 43

RMS Noise and Resolution............................................................ 46

High Resolution Mode............................................................... 46

Low Power Mode........................................................................ 46

Diagnostics and Monitoring ......................................................... 47

Self Diagnostics Error ................................................................ 47

Monitoring Using the AD7770 SAR ADC (SPI Control

Mode)........................................................................................... 48

Σ-Δ ADC Diagnostics (SPI Control Mode)............................ 50

Σ-∆ Output Data............................................................................. 51

ADC Conversion Output—Header and Data ........................ 51

SRC (SPI Control Mode)........................................................... 52

Data Output Interface................................................................ 53

Calculating the CRC Checksum .............................................. 58

Channel 0 Configuration Register ........................................... 64

Channel 1 Configuration Register ........................................... 64

Channel 2 Configuration Register ........................................... 65

Channel 3 Configuration Register ........................................... 65

Channel 4 Configuration Register ........................................... 66

Channel 5 Configuration Register ........................................... 66

Channel 6 Configuration Register ........................................... 67

Channel 7 Configuration Register ........................................... 67

Disable Clocks to ADC Channel Register .............................. 68

Channel 0 Sync Offset Register ................................................ 68

Channel 1 Sync Offset Register ................................................ 68

Channel 2 Sync Offset Register ................................................ 68

Channel 3 Sync Offset Register ................................................ 69

Channel 4 Sync Offset Register ................................................ 69

Channel 5 Sync Offset Register ................................................ 69

Channel 6 Sync Offset Register ................................................ 69

Channel 7 Sync Offset Register ................................................ 69

General User Configuration 1 Register................................... 70

General User Configuration 2 Register................................... 70

General User Configuration 3 Register................................... 71

Data Output Format Register ................................................... 72

Main ADC Meter and Reference Mux Control Register ...... 73

Global Diagnostics Mux Register............................................. 74

GPIO Configuration Register................................................... 74

GPIO Data Register.................................................................... 75

Buffer Configuration 1 Register............................................... 75

Buffer Configuration 2 Register............................................... 75

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