AD7771BCPZ-RL datasheet(3/99 Pages) AD

3 / 99 page

AD7771

Data Sheet

Rev. 0 | Page 2 of 98

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Revision History ............................................................................... 3

Functional Block Diagram .............................................................. 4

Specifications..................................................................................... 5

DOUTx Timing Characterististics............................................. 9

SPI Timing Characterististics ................................................... 10

Synchronization Pins and Reset Timing Characteristics...... 11

SAR ADC Timing Characterististics ....................................... 12

GPIO SRC Update Timing Characterististics......................... 12

Absolute Maximum Ratings.......................................................... 13

Thermal Resistance .................................................................... 13

ESD Caution................................................................................ 13

Pin Configuration and Function Descriptions........................... 14

Typical Performance Characteristics ........................................... 17

Terminology .................................................................................... 32

Theory of Operation ...................................................................... 34

Analog Inputs.............................................................................. 34

Transfer Function ....................................................................... 35

Core Signal Chain....................................................................... 36

Capacitive PGA........................................................................... 36

Internal Reference and Reference Buffers............................... 36

Integrated LDOs ......................................................................... 37

Clocking and Sampling.............................................................. 37

Digital Reset and Synchronization Pins .................................. 37

Digital Filtering........................................................................... 38

Shutdown Mode.......................................................................... 38

Controlling the AD7771............................................................ 39

Pin Control Mode....................................................................... 39

SPI Control.................................................................................. 42

Digital SPI.................................................................................... 44

RMS Noise and Resolution............................................................ 47

High Resolution Mode............................................................... 47

Low Power Mode........................................................................ 48

Diagnostics and Monitoring ......................................................... 49

Self Diagnostics Error ................................................................ 49

Monitoring Using the AD7771 SAR ADC (SPI Control

Mode)........................................................................................... 50

Σ-Δ ADC Diagnostics (SPI Control Mode)............................ 52

Σ-∆ Output Data............................................................................. 53

ADC Conversion Output—Header and Data ........................ 53

Sample Rate Converter (SRC) (SPI Control Mode) .............. 54

Data Output Interface................................................................ 56

Calculating the CRC Checksum .............................................. 60

Channel 0 Configuration Register ........................................... 65

Channel 1 Configuration Register ........................................... 65

Channel 2 Configuration Register ........................................... 66

Channel 3 Configuration Register ........................................... 66

Channel 4 Configuration Register ........................................... 67

Channel 5 Configuration Register ........................................... 67

Channel 6 Configuration Register ........................................... 68

Channel 7 Configuration Register ........................................... 68

Disable Clocks to ADC Channel Register .............................. 69

Channel 0 Sync Offset Register ................................................ 69

Channel 1 Sync Offset Register ................................................ 69

Channel 2 Sync Offset Register ................................................ 69

Channel 3 Sync Offset Register ................................................ 70

Channel 4 Sync Offset Register ................................................ 70

Channel 5 Sync Offset Register ................................................ 70

Channel 6 Sync Offset Register ................................................ 70

Channel 7 Sync Offset Register ................................................ 70

General User Configuration 1 Register................................... 71

General User Configuration 2 Register................................... 72

General User Configuration 3 Register................................... 73

Data Output Format Register ................................................... 73

Main ADC Meter and Reference Mux Control Register ...... 74

Global Diagnostics Mux Register............................................. 75

GPIO Configuration Register................................................... 75

GPIO Data Register.................................................................... 76

Buffer Configuration 1 Register............................................... 76

Buffer Configuration 2 Register............................................... 76

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