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AD9484

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AD9484 CONFIGURATION USING THE SPI

The AD9484 SPI allows the user to configure the converter for

specific functions or operations through a structured register

space inside the ADC. This gives the user added flexibility to

customize device operation depending on the application.

Addresses are accessed (programmed or readback) serially in

1-byte words. Each byte can be further divided into fields,

which are documented in the Memory Map section.

There are three pins that define the serial port interface (SPI) to

this particular ADC. They are the SCLK/DFS, SDIO and CSB

pins. The SCLK/DFS (serial clock) is used to synchronize the

read and write data presented the ADC. The SDIO (serial data

input/output) is a dual-purpose pin that allows data to be sent

to and read from the internal ADC memory map registers. The

CSB is an active low control that enables or disables the read

and write cycles (see Table 8).

Table 8. Serial Port Pins

Mnemonic

Function

SCLK

SCLK (serial clock) is the serial shift clock in.

SCLK is used to synchronize serial interface

reads and writes.

SDIO

SDIO (serial data input/output) is a dual-purpose

pin. The typical role for this pin is an input and

output depending on the instruction being sent

and the relative position in the timing frame.

CSB

CSB (chip select) is an active low control that

gates the read and write cycles.

The falling edge of the CSB, in conjunction with the rising edge

of the SCLK, determines the start of the framing. An example of

the serial timing and its definitions can be found in Figure 39

and Table 10.

During an instruction phase, a 16-bit instruction is transmitted.

Data then follows the instruction phase and is determined by

the W0 and W1 bits, which is one or more bytes of data. All

data is composed of 8-bit words. The first bit of each individual

byte of serial data indicates whether this is a read or write

command. This allows the serial data input/output (SDIO) pin

to change direction from an input to an output.

Data can be sent in MSB or in LSB first mode. MSB first is

default on power-up and can be changed by changing the

configuration register. For more information about this feature

and others, see the AN-877 Application Note, Interfacing to

High Speed ADCs via SPI at www.analog.com.

HARDWARE INTERFACE

The pins described in Table 8 comprise the physical interface

between the programming device of the user and the serial port

of the AD9484. The SCLK pin and the CSB pin function as

inputs when using the SPI interface. The SDIO pin is bidirec-

tional, functioning as an input during the write phase and as an

output during readback.

This interface is flexible enough to be controlled by either

PROMs or PIC® microcontrollers as well. This provides the user

with an alternate method to program the ADC other than a SPI

controller.

If the user chooses not to use the SPI interface, some pins serve

a dual function and are associated with a specific function when

strapped externally to AVDD or ground during device power-

on. The Configuration Without the SPI section describes the

strappable functions supported on the AD9484.

CONFIGURATION WITHOUT THE SPI

In applications that do not interface to the SPI control registers,

the SCLK/DFS pin can alternately serve as a standalone CMOS-

compatible control pin. Connect the CSB pin to AVDD, which

disables the serial port interface.

Table 9. Mode Selection

Mnemonic

External

Voltage

Configuration

AVDD

Twos complement enabled

SCLK/DFS

AGND

Offset binary enabled

DON’T CARE

CSB

tDH

tHIGH

tCLK

tLOW

tDS

R/W

A12

A11

A10

SDIO DON’T CARE

SCLK DON’T CARE

Figure 39. Serial Port Interface Timing Diagram

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