AD5171BRJ50-R2 datasheet(12/20 Pages) AD

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AD5171

Table 5. RWB vs. Codes; RAB = 10 kΩ and

the A Terminal Is Opened

D (Dec)

RWB (Ω)

Output State

10060

Full-Scale (RAB + RW)

5139

Midscale

219

1 LSB

Zero-Scale (Wiper Contact Resistance)

Since a finite wiper resistance of 60 Ω is present in the zero-

scale condition, care should be taken to limit the current flow

between W and B in this state to a maximum pulse current of

no more than 20 mA. Otherwise, degradation or possible

destruction of the internal switch contact can occur.

Similar to the mechanical potentiometer, the resistance of the

RDAC between the wiper W and terminal A also produces a

complementary resistance RWA. When these terminals are used,

the B terminal can be opened or shorted to W. Setting the

resistance value for RWA starts at a maximum value of resistance

and decreases as the data loaded in the latch increases in value.

The general equation for this operation is

−

)

(

(2)

Table 6. RWA vs. Codes; RAB =10 kΩ and

B Terminal Is Opened

D (Dec)

RWA (Ω)

Output State

Full-Scale

4980

Midscale

9901

1 LSB

10060

Zero-Scale

The typical distribution of the resistance tolerance from device

to device is process lot dependent, and it is possible to have

±30% tolerance.

RDAC

LATCH

AND

DECODER

Figure 26. AD5171 Equivalent RDAC Circuit

Potentiometer Mode Operation

If all three terminals are used, the operation is called the

potentiometer mode. The most common configuration is the

voltage divider operation (Figure 27).

Figure 27. Potentiometer Mode Configuration

Ignoring the effect of the wiper resistance, the transfer function

is simply

)

(

(3)

A more accurate calculation, which includes the wiper

resistance effect, yields

)

(

AB +

(4)

Unlike in rheostat mode operation where the absolute tolerance

is high, potentiometer mode operation yields an almost ratio-

metric function of D/63 with a relatively small error contributed

by the RW terms, and therefore the tolerance effect is almost

cancelled. Although the thin film step resistor RS and CMOS

switches resistance RW have very different temperature coefficients,

the ratio-metric adjustment also reduces the overall temperature

coefficient effect to 5 ppm/oC, except at low value codes where RW

dominates.

Potentiometer mode operations include others such as op amp

input, feedback resistor networks, and other voltage scaling

applications. A, W, and B terminals can in fact be input or output

terminals provided that |VAB|, |VWA|, and |VWB| do not exceed

VDD to GND.

ESD PROTECTION

Digital inputs SDA and SCL are protected with a series input

resistor and parallel Zener ESD structures (Figure 28).

LOGIC

340

Ω

Figure 28. ESD Protection of Digital Pins

Rev. PrC | Page 12 of 20

Preliminary Technical Data

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