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T0514TP 数据表(PDF) 7 Page - Chip Integration Technology Corporation |
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T0514TP 数据表(HTML) 7 Page - Chip Integration Technology Corporation |
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7 / 9 page ![]() 7 Package Outline DFN2510-10L package Thermally-Enhanced MSL-1 Level Ultra-Low Capacitance ESD Protection Device T0514TP Chip Integration Technology Corporation D E Pin1 Dot by Marking e b L Pin1 Idenification Chamfer A1 A A3 Symbol Dimensions (mm) Minimum A A1 A3 b D E e L Dimensions (inch) Package Dimensions (Controlling dimensions are in millimetes) Maximum Minimum Maximum 0.500 0.600 0.020 0.024 0.000 0.050 0.000 0.002 0.150 0.250 0.006 0.010 2.450 2.550 0.096 0.100 0.950 1.050 0.037 0.041 0.300 0.400 0.012 0.016 0.150REF. 0.006REF. 0.500 BSC 0.020 BSC Document ID : DS-22V17 Revised Date : 2017/07/20 Revision : C |
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