Original Creation Date: 04/20/98

Last Update Date: 08/24/98

Last Major Revision Date: 04/20/98

MNDM54LS502-X REV 1A0

MICROCIRCUIT DATA SHEET

8 - BIT SUCCESSIVE APPROXIMATION REGISTER

General Description

The 'LS502 is an 8-bit register with the interchange logic necessary to perform

serial-to-parallel conversion and provide an active LOW Conversion Complete (CC) signal

coincident with storage of the eighth bit.

An active LOW Start (S) input performs

synchronous initialization which forces Q7 LOW and all others HIGH.

Subsequent clocks

shift Q7 LOW signal downstream which simultaneously backfills the register such that the

first serial data (D input) bit is stored in Q7, the second bit in Q6, the third in Q5,

etc.

The serial input data is also synchronized by an auxilliary flip-flop and brought

out on QD.

Designed primarily for use in the successive approximate technique for analog-to-digital

conversion, the 'LS502 can also be used as a serial-to-parallel conversion ring counter

and as the storage and control element in recursive digital routines.

NS Part Numbers

DM54LS502J/883*

DM54LS502W/883**

Industry Part Number

54LS502

Prime Die

L502

Controlling Document

5962-9080001MEA*, MFA**

Processing

MIL-STD-883, Method 5004

Quality Conformance Inspection

MIL-STD-883, Method 5005

Subgrp Description

Temp ( C)

o

1

Static tests at

+25

2

Static tests at

+125

3

Static tests at

-55

4

Dynamic tests at

+25

5

Dynamic tests at

+125

6

Dynamic tests at

-55

7

Functional tests at

+25

8A

Functional tests at

+125

8B

Functional tests at

-55

9

Switching tests at

+25

10

Switching tests at

+125

11

Switching tests at

-55

1