ST92F120V9 datasheet(54/324 Pages) STMICROELECTRONICS

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ST92F120 - REGISTER AND MEMORY MAP

4 REGISTER AND MEMORY MAP

4.1 INTRODUCTION

The ST92F120 register map, memory map and

peripheral options are documented in this section.

Use this reference information to supplement the

functional descriptions given elsewhere in this

document.

4.2 MEMORY CONFIGURATION

The Program memory space of the ST92F120 up

to 128K bytes of directly addressable on-chip

memory, is fully available to the user.

4.2.1 Reset Vector Location

In 128k devices, the reset vector is located in

01E000h.

In 60k devices, the reset vector is located in

000000h.

4.2.2 Location of Vector for External Watchdog

Refresh

If an external watchdog is used, it must be re-

freshed during TestFlash execution by a user writ-

ten routine. This routine has to be located in Flash

memory, the address where the routine starts has

to be written in 000006h (one word) while the seg-

ement where the routine is located has to be writ-

ten in 000009h (one byte).

This routine is called at least once every time that

the TestFlash executes an EEPROM write opera-

tion. If the write operation has a long duration, the

user routine is called with a rate fixed by location

000008h with an internal clock frequency of 2

MHz, location 000008h fixes the number of mill-

seconds to wait between two calls of the user rou-

tine.

Table 13. User Routine Parameters

If location 000006h to 000007h is virgin (FFFFh),

the user routine is not called.

Location

Size

Description

000006h to

000007h

2 bytes

User routine address

000008h

1 byte

ms rate at 2 MHz.

000009h

1 byte

User routine segment

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