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Figure 6. Isolated Signal Output Connections

Output High Voltage

2.4

3.6

V

Output Low Voltage

0

0.4

V

Input High Voltage

2.0

3.6

V

Input Low Voltage

0

0.8

V

Sink current(PW_OK_H)

4

mA

Operate voltage (between INHIBIT_L and INHIBIT_L_RTN )

2.0

10

V

Max operate current (SMB_ALERT_L)

30

mA

Table 1. Low-Voltage TTL (LVTTL) Voltage Levels

Output voltage rise time from each output

0.5

100

mS

2500

mS

Delay from AC being applied to V1 being within regulation

3000

mS

T4 (Tv1_holdup)

Time V1 stay within 90% normal output after loss of AC

16

mS

Delay from loss of AC to de-assertion of PW_OK_H

10

mS

Delay INHIBIT_L active to V1 output voltages within regulation

1000

mS

T7 (TinhibitL_pwok)

Delay from INHIBIT_L de-active to PW_OK_H being de-asserted

50

mS

Delay from V1 within regulation to PW_OK_H asserted at turn on

100

1000

mS

Delay from PW_OK_H de-asserted to V1 dropping out of regulation at

60% loading of full load

1

mS

20

mS

50

1000

mS