TLF6416

June 1989

54LS253DM54LS253DM74LS253

TRI-STATE

Data SelectorsMultiplexers

General Description

Each of these Schottky-clamped data selectorsmultiplex-

ers contains inverters and drivers to supply fully comple-

mentary on-chip binary decoding data selection to the

AND-OR gates Separate output control inputs are provided

for each of the two four-line sections

The TRI-STATE outputs can interface directly with data

lines of bus-organized systems With all but one of the com-

mon outputs disabled (at a high impedance state) the low

impedance of the single enabled output will drive the bus

line to a high or low logic level

Features

Y

TRI-STATE version of LS153 with same pinout

Y

Schottky-diode-clamped transistors

Y

Permit multiplexing from N-lines to one line

Y

Performs parallel-to-serial conversion

Y

Strobeoutput control

Y

High fanout totem-pole outputs

Y

Typical propagation delay

Data to output

12 ns

Select to output

21 ns

Y

Typical power dissipation 35 mW

Y

Alternate MilitaryAerospace device (54LS253) is avail-

able Contact a National Semiconductor Sales Office

Distributor for specifications

Connection Diagram

Dual-In-Line Package

TLF6416 – 1

Order Number 54LS253DMQB 54LS253FMQB

54LS253LMQB DM54LS253J DM54LS253W

DM74LS253M or DM74LS253N

See NS Package Number E20A J16A

M16A N16E or W16A

Function Table

Select

Data Inputs

Output

Output

Inputs

Control

B

A

C0

C1

C2

C3

G

Y

XX

XX

X

X

H

Z

LL

L

X

X

X

L

L

LL

H

X

X

X

L

H

LH

X

L

X

X

L

L

LH

X

H

X

X

L

H

HL

XX

L

X

L

L

HL

XX

H

X

L

H

HH

X

X

X

L

L

L

HH

X

X

X

H

L

H

Address Inputs A and B are common to both sections

TRI-STATE

is a registered trademark of National Semiconductor Corporation

C1995 National Semiconductor Corporation

RRD-B30M105Printed in U S A